65 nm process
| Semiconductor device fabrication |
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MOSFET scaling (process nodes) |
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Future
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The 65 nm process is an advanced
semiconductor fabrication. Printed linewidths (i.e. transistor gate lengths) can reach as low as 25 nm on a nominally 65 nm process, while the pitch between two lines may be greater than 130 nm.[1]
Process node
For
Chartered
were also producing 65 nm chips.
While feature sizes may be drawn as 65 nm or less, the wavelengths of light used for
phase-shifting masks
. The cost of these techniques adds substantially to the cost of manufacturing sub-wavelength semiconductor products, with the cost increasing exponentially with each advancing technology node. Furthermore, these costs are multiplied by an increasing number of mask layers that must be printed at the minimum pitch, and the reduction in yield from printing so many layers at the cutting edge of the technology. For new integrated-circuit designs, this factors into the costs of prototyping and production.
Gate thickness, another important dimension, is reduced to as little as 1.2 nm (Intel). Only a few atoms insulate the "switch" part of the transistor, causing charge to flow through it. This undesired
quantum tunneling. The new chemistry of high-κ gate dielectrics must be combined with existing techniques, including substrate bias
and multiple threshold voltages, to prevent leakage from prohibitively consuming power.
interconnects (metal and poly pitch) continue to shrink, thus reducing chip area and chip cost, as well as shortening the distance between transistors, leading to higher-performance devices of greater complexity when compared with earlier nodes. Intel's 65nm process has a transistor density of 2.08 million transistors per square milimeter (MTr/mm2).[2]
Example: Fujitsu 65 nm process
- Gate length: 30 nm (high-performance) to 50 nm (low-power)
- Core voltage: 1.0 V
- 11 Cu interconnect layers using nano-clustering silica as ultralow κ dielectric(κ=2.25)
- Metal 1 pitch: 180 nm
- Nickel silicide source/drain
- Gate oxide thickness: 1.9 nm (n), 2.1 nm (p)
There are actually two versions of the process: CS200, focusing on high performance, and CS200A, focusing on low power.
Processors using 65 nm manufacturing technology
- Sony/Toshiba PStwo)[5]- 2005
- Intel Core – 2006-01-05
- Intel Pentium 4 (Cedar Mill) – 2006-01-16
- Intel Pentium D 900-series – 2006-01-16
- Intel Sossaman) – 2006-03-14
- Intel Celeron D(Cedar Mill cores) – 2006-05-28
- Intel Core 2– 2006-07-27
- AMD Athlon 64 series (starting from Lima) – 2007-02-20
- AMD Turion 64 X2series (starting from Tyler) – 2007-05-07
- Microsoft Xbox 360 "Falcon" CPU – 2007–09
- 8800GTGPU – 2007-10-29
- Sony/Toshiba/IBM Cell (PlayStation 3) (updated) – 2007-10-30
- Sun UltraSPARC T2 – 2007–10
- AMD Phenomseries
- IBM's z10
- Microsoft Xbox 360 "Opus" CPU – 2008
- TI OMAP 3 Family[6]– 2008-02
- VIA Nano – 2008-05
- AMD Turion Ultra – 2008-06[7]
- Microsoft Xbox 360 "Jasper" CPU – 2008–10
- Loongson – 2009
- Nikon Expeed 2 – 2010
- MCST Elbrus 4C – 2014[8]
- SRISA 1890VM9Ya – 2016[9]
References
- ^ 2006 industry roadmap Archived September 27, 2007, at the Wayback Machine, Table 40a.
- ^ "Intel's 10nm Cannon Lake and Core i3-8121U Deep Dive Review".
- ^ "Fujitsu Introduces World-class 65-Nanometer Process Technology for Advanced Server, Mobile Applications". Fujitsu (Press release). Sunnyvale, CA. September 20, 2005. Archived from the original on September 27, 2011. Retrieved August 10, 2008.
- ^ Kim, Paul (February 7, 2006). 65nm CMOS Process Technology (PDF). DesignCon. Fujitsu.
- ^ "ソニー、65nm対応の半導体設備を導入。3年間で2,000億円の投資". pc.watch.impress.co.jp. Archived from the original on August 13, 2016.
- ^ "OMAP 3 family of multimedia applications processors" (PDF). Texas Instruments. 2007. p. 1.
- ^ Gruener, Wolfgang (May 3, 2007). "AMD preps 65 nm Turion X2 processors". TG Daily. Archived from the original on September 13, 2007. Retrieved March 4, 2008.
- ^ "Microprocessor Elbrus-4C".
- ^ "ФГУ ФНЦ НИИСИ РАН: Разработка СБИС".
Sources
- "Intel to cut Prescott leakage by 75% at 65nm". The Register. August 31, 2004. Retrieved August 25, 2007.
- Engineering Sample of the "Yonah" core Pentium M, IDF Spring 2005, ExtremeTech
- "AMD's 65 nano silicon ready to roll". The Inquirer. September 2, 2005. Archived from the original on November 25, 2005. Retrieved August 25, 2007.
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| Preceded by 90 nm |
MOSFET manufacturing processes | Succeeded by 45 nm |