In 2007, Cadence announced it would be introducing a new chip-making process that laid wires diagonally as well as horizontally and vertically, arguing it would make its designs more efficient. In June 2007, Cadence had a market value of around $6.4 billion. That year, Cadence was rumored to be in talks with
Blackstone Group regarding a possible sale of the company.[6] Cadence withdrew a $1.6 billion offer to purchase Mentor Graphics in 2008.[19] Also that year, Cadence's board appointed Lip-Bu Tan as acting CEO, after the resignation of Mike Fister; Tan had served on the Cadence board of directors since 2004.[20] In January 2009, the board of directors of Cadence voted unanimously to confirm Lip-Bu Tan as president and CEO.[21] In 2011, it purchased Altos Design Automation.[22] Subsequent notable acquisitions included Cosmic Circuits[23] and Tensilica in 2013,[24]Forte Design Systems in 2014,[25] and the AWR Corporation in 2019.[26]
Although most of Cadence's customers for decades were "traditional semiconductor firms," around 40% of Cadence's revenue by 2022 came from customers who were "systems" oriented, or seeking products tailored for various industries that utilized chips in a central role. Cadence was also increasingly designing customized chips for clients and having them manufactured by third parties such as
Taiwan Semiconductor Manufacturing, a practice which had become more popular in the face of worldwide chip shortages and shipping issues, according to Reuters.[13] By late 2022, Cadence had clients such as Tesla and Apple Inc.[13] Cadence acquired OpenEye Scientific Software for $500 million in September 2022, rebranding the company OpenEye Cadence Molecular Sciences and making it into a business unit.[5] OpenEye signed Pfizer as a software client in October 2023.[32] Cadence purchased various businesses from Rambus in 2023.[33]
Products
Originally known as a creator of
intellectual property (IP) used to design chips,[35]chiplet-style products,[36] and printed circuit boards,[9] while also selling hardware systems that run its chip design software.[34]
It also has tools for "electromagnetics, thermal and computational fluid dynamics in the high-tech electronics, aerospace and defense and automotive sectors,"[5] and according to Investor's Business Daily in 2023, it specializes in products for fields such as "artificial intelligence and machine learning, cloud computing, 3D technology, and AI-enabled big data analytics."[37] Among market applications are "hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and health care."[5]
Integrated circuit software
The company develops a number of technologies for creating custom integrated circuits. For example, its Virtuoso Platform incorporates tools for designing full-custom integrated circuits.[38] In 2019, Cadenced introduced its Spectre X parallel circuit simulator, so that users could distribute time- and frequency-domain simulations across hundreds of CPUs for speed.[39] Cadence also developed AWR, a radio frequency to millimeter wave design environment for designing 5G/wireless products. AWR is used for communications, aerospace and defense, semiconductor, computer, and consumer electronics.[40][41]
Digital implementation and signoff
Cadence has a number of digital
signoff tools, including Genus, Innovus, Tempus & Voltus, among others. In 2020, Cadence integrated its Innovus place and route engine and optimizer into Genus Synthesis.[42]Stratus is Cadence's high-level synthesis tool, and is used to create RTL implementations from C, C++, or SystemC code.[43] Other formal verification and signoff tools include Conformal Equivalence Checker,[44] Joules RTL Power Solution,[45] Quantus Extraction Solution,[46] and Cadence's Modus DFT Software Solution.[47]
System verification
Cadence has developed a number of formal verification products for chip design. JasperGold is a formal verification tool, initially introduced in 2003[48] and upgraded with machine learning in 2019.[49]vManager is a verification management tool for tracking the verification process.[50][51] Cadence announced Perspec System Verifier in 2014 for defining and verifying system-level verification scenarios,[52] with Perspec made compatible with the Accellera Portable Test and Stimulus Standard (PSS) several years later.[53] Introduced in 2017, Cadence's parallel simulator Xcelium is based on a multi-core parallel computing architecture.[54]
Hardware emulation
In 2015, Cadence announced the Palladium Z1 hardware emulation platform,[55] with over 100 million gates per hour compile speed, and greater than 1 MHz execution for billion-gate designs.[56] which was based on emulation technology from Cadence's 1998 acquisition of Quickturn.[15] Cadence announced Palladium Z2 in 2021, claiming a 1.5X performance and 2X capacity improvement over the Z1.[57][58]
The Protium
FPGAs.[60] Protium X1 rack-based prototyping was introduced in 2019,[61] which Cadence claimed supported a 1.2 billion gate SoCs at around 5 MHz.[62] with Palladium S1/X1 and Protium sharing a single compilation flow.[63] IIn 2021, Protium X2 was announced; Cadence claimed a 1.5X performance and 2X capacity improvement over Protium X1.[64][65]
MIPI, ethernet,[66] memory, analog, SoC peripherals, and data plane processing units. Cadence also develops chip verification technologies including simulators and formal verification tools.[citation needed] Cadence develops TensilicaDSP processors for audio, vision, wireless modems, and convolutional neural nets. Tensilica DSP processors IP in 2019[67] included: Tensilica Vision DSPs for imaging, vision, and AI processing;[68][69] Tensilica HiFi DSPs for audio processing;[70][71] Tensilica Fusion DSPs for IoT;[72] Tensilica ConnX DSPs for radar, lidar, and communications processing;[73][74] and Tensilica DNA Processor Family for AI acceleration.[75][76] In 2021, Cadence launched the Tensilica AI Platform to accelerate AI SoC development and improve performances.[77]
field solver for electromagnetic analysis, that uses distributed adaptive meshing to partition jobs across multiple cores.[82] In September 2019, Cadence announced Celsius, a parallel architecture thermal solver that uses finite element analysis for solid structures and computational fluid dynamics (CFD) for fluids.[83]
Cascade Technologies, Inc includes hi-fidelity CFD solvers for multiphysics analysis of turbulence fluid flow.[84] Acquired by Cadence from Pointwise in 2021, Fidelity Pointwise is for computational fluid dynamics (CFD) mesh generation.[85]
Automotive and machine design
Cadence in 2021 acquired a number of system analysis products from NUMECA,
multi-physics simulation, and optimization product.[86]
The company was increasingly incorporating artificial intelligence (AI) in 2023, according to Reuters, by "providing tools to design chips for AI" as well as by "adding AI into its own software to help in the complex process of designing chips."[34]Cerebrus was released in 2021, and is a machine learning-based chip which utilizes reinforcement learning and is meant to automatically optimize the Cadence digital design flow.[89][31] In 2022, Cadence introduced the AI platform Optimality Intelligent System Explorer, a system design tool with multiphysics system analysis software. Designed to be compatible with Clarity 3D and SigrityX, Microsoft was an early adopter.[90]
Recognition
In 2016, Cadence CEO Lip-Bu Tan was awarded the Dr. Morris Chang Exemplary Leadership Award by the Global Semiconductor Alliance.
Fortune Magazine named Cadence to its 100 Best Companies to Work For list for the sixth consecutive year in 2020.[94]
Sponsorship
In May 2022, the
Formula 1 motor racing team McLaren announced a multi-year partnership deal with Cadence.[95] Cadence partnered with the San Francisco 49ers in April 2023 on a several year technology project to fix energy efficiencies at Levi's Stadium. The deal also gave Cadence the naming rights to the team's mobile app.[96]
Aptix Corporation Quickturn Design Systems, a company acquired by Cadence, was involved in a series of legal events with Aptix Corporation. Aptix licensed a patent to Mentor Graphics and the two companies jointly sued Quickturn over an alleged patent infringement. Amr Mohsen, CEO of Aptix, forged and tampered with legal evidence and was subsequently charged with conspiracy, perjury, and obstruction of justice. Mohsen was arrested after violating his bail agreement by attempting to flee the country. While in jail, Mohsen plotted to intimidate witnesses and kill the federal judge presiding over his case.[138] Mohsen was further charged with attempting to delay a federal trial by feigning incompetency.[139][140] Due to the overwhelming misconduct, the judge ruled the lawsuit as unenforceable and Mohsen was sentenced to 17 years in prison.[141] Mentor Graphics subsequently sued Aptix to recoup legal costs. Cadence also sued Mentor Graphics and Aptix to recover legal costs.[142]
Berkeley Design Automation In 2013, Cadence sued Berkeley Design Automation (BDA) for circumvention of a license scheme to link its Analog FastSpice (AFS) simulator to Cadence's Analog Design Environment (Virtuoso ADE).[143] The lawsuit was settled less than one year later with an undisclosed payment of BDA and a multi-year agreement to support interoperability of AFS with ADE through Cadence's official interface. BDA was bought by Mentor Graphics a few months later.[144]
Ken Kundert, Cadence fellow and creator of the Spectre circuit simulation family of products (including SpectreRF) and the Verilog-A analog hardware description language