Emotion Engine
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The Emotion Engine is a
Description
The Emotion Engine consists of eight separate "units", each performing a specific task, integrated onto the same die. These units are: a CPU core, two Vector Processing Units (VPU), a 10-channel DMA unit, a memory controller, and an Image Processing Unit (IPU). There are three interfaces: an input output interface to the I/O processor, a graphics interface (GIF) to the graphics synthesizer, and a memory interface to the system memory.[2]
The CPU core is tightly coupled to the first VPU, VPU0. Together, they are responsible for executing game code and high-level modeling computations. The second VPU, VPU1, is dedicated to geometry-transformations and lighting and operates independently, parallel to the CPU core, controlled by
CPU core
The CPU core is a two-way
It has a 6-stage integer
To feed the execution units with instructions and data, there is a 16 KB two-way set
Vector processing units
The majority of the Emotion Engine's
To achieve high bandwidth, the VPU's data memory is connected directly to the GIF, and both of the data memories can be read directly by the
The FMAC units take four cycles to execute one instruction, but as the units have a six-stage pipeline, they have a throughput of one instruction per cycle. The FDIV unit has a nine-stage pipeline and can execute one instruction every seven cycles.
Image Processing Unit (IPU)
The IPU allowed
DMA, DRAM and Memory Management Unit (MMU)
The memory management unit, RDRAM controller and DMA controller handle memory access within the system.[5]
Internal data bus
Communications between the MIPS core, the two VPUs, GIF, memory controller and other units is handled by a 128-bit wide internal data bus running at half the clock frequency of the Emotion Engine but, to offer greater bandwidth, there is also a 128-bit dedicated path between the CPU and VPU0 and a 128-bit dedicated path between VPU1 and GIF. At 150 MHz, the internal data bus provides a maximum theoretical bandwidth of 2.4 GB/s.
External interface
Communication between the Emotion Engine and RAM occurs through two channels of
The Emotion Engine interfaces directly to the Graphics Synthesizer via the GIF with a dedicated 64-bit, 150 MHz bus that has a maximum theoretical bandwidth of 1.2 GB/s.[6]
To provide communications between the Emotion Engine and the Input Output Processor (IOP), the input output interface interfaces a 32-bit wide, 37.5 MHz input output bus with a maximum theoretical bandwidth of 150 MB/s to the internal data bus. The interface provides enough bandwidth for the PCMCIA extension connector which was used for the network adapter with built-in P-ATA interface for faster data access and online functionality. An advantage of the high bandwidth was that it could be easily used to introduce hardware extensions like the Network Adapter with built-in IDE HDD support or other extensions to extend functionality and product lifecycle which can be seen as a competitive advantage. In newer variants (like the slim edition), the interface would however, offer vastly more bandwidth than what is required by the PlayStation's input output devices as the HDD support was removed and the PCMCIA connector design was abandoned in favor of a slimmer design.
Fabrication
The Emotion Engine contained 13.5 million
Packaging
The Emotion Engine was packaged in a 540-contact plastic ball grid array (PBGA).
Uses
The primary use of the Emotion Engine was to serve as the PlayStation 2's CPU.
The first
The Emotion Engine was also used in the PSX (digital video recorder) as well as the HDTV television models Sony WEGA HVX (Model Numbers KDE-xxxHVX/KDL-xxxHVX) and Sony BRAVIA KDL22PX300, all of which used PlayStation 2 hardware.
Technical specifications
- MHz, 299 MHz (later versions)
- Instruction set: MIPS III, MIPS IV subset, 107 vector instructions
- 2-issue, 2 64-bit fixed point units, 1 floating point unit, 6 stage pipeline
- Instruction cache: 16 KB, 2-way set associative
- Data cache: 8 KB, 2-way set associative
- Scratchpad RAM: 16 KB
- Translation look aside buffer: 48-entry combined instruction/data
- Vector processing unit: 4 FMAC units, 1 FDIV unit
- Vector processing unit registers: 128-bit wide, 32 entries
- Image processing unit: MPEG2 macroblock layer decoder
- Direct memory access: 10 channels
- VDD Voltage: 1.8 V
- Power consumption: 15 Wat 1.8 V
- Embedded memory: 1 KB
Theoretical performance
- floating-point operations per second
- transformation: 66 million polygons per second
- With lighting and fog: 36 million polygons per second
- Bézier surface patches: 16 million polygons per second
- Image decompression: 150 million pixels per second
See also
- Graphics card
- Graphics processing unit
- Computer graphics
- List of computer graphics and descriptive geometry topics
- Cell microprocessor, a design inspired by the Emotion Engine's CPU+VU0/VU1 arrangement, used in the PlayStation 3
References
- ^ Gilbert, Ben. "Sony confirms production end for PlayStation 2 worldwide". Engadget. Retrieved 23 June 2013.
- ^ Stokes, Jon (16 February 2000). "Sound and Vision: A Technical Overview of the Emotion Engine". Ars Technica. Archived from the original on 10 June 2018. Retrieved 9 June 2015.
- ^ Diefendorff, Keith (19 April 1999). "Sony's Emotionally Charged Chip" (PDF). Microprocessor Report. Vol. 13, no. 5. Archived (PDF) from the original on 25 July 2018. Retrieved 1 September 2017.
- ^ Transistorized memory, such as RAM, ROM, flash and cache sizes as well as file sizes are specified using binary meanings for K (10241), M (10242), G (10243), etc.
- ^ a b Sporny, Many; Carper, Gray; Turner, Jonathan (2002). "The Playstation 2 Linux Kit Handbook". Free Software Foundation. Archived from the original on 18 September 2003. Retrieved 10 June 2015.
- ^ Diefendorff 1999, p. 5
- ISBN 978-0-08-050252-6. Retrieved 9 April 2013.
- S2CID 29649747.
- ISBN 9789400710191.
References
- ISBN 978-0-08-050252-6. Retrieved 9 April 2013.
- Diefendorff, Keith (19 April 1999). "Sony's Emotionally Charged Chip". Microprocessor Report. 13 (5). Microdesign Resources.