i386

The Intel 386, originally released as 80386 and later renamed i386, is a 32-bit microprocessor designed by Intel. The first pre-production samples of the 386 were released to select developers in 1985, while mass production commenced in 1986. The processor was a significant evolution in the x86 architecture, extending a long line of processors that stretched back to the Intel 8008. The 386 was the central processing unit (CPU) of many workstations and high-end personal computers of the time. The 386 began to fall out of public use starting with the release of the i486 processor in 1989, while in embedded systems the 386 remained in widespread use until Intel finally discontinued it in 2007.

Compared to its predecessor the

The 80386 featured three operating modes: real mode, protected mode and virtual mode. The protected mode, which debuted in the 80286, was extended to allow the 386 to address up to 4 GB of memory. With the addition of segmented addressing system, it can expand up to 64 terabytes of virtual memory. The all new virtual 8086 mode (or VM86) made it possible to run one or more real mode programs in a protected environment, although some programs were not compatible.

The 32-bit i386 can correctly execute most code intended for the earlier 16-bit processors such as 8086 and 80286 that were ubiquitous in early PCs. As the original implementation of the 32-bit extension of the 80286 architecture,^[a] the i386 instruction set, programming model, and binary encodings are still the common denominator for all 32-bit x86 processors, which is termed the i386 architecture, x86, or IA-32, depending on context. Over the years, successively newer implementations of the same architecture have become several hundreds of times faster than the original 80386 (and thousands of times faster than the 8086).^[b]

Production history

Development of i386 technology began in 1982 under the internal name of P3.

In May 2006, Intel announced that i386 production would stop at the end of September 2007.[16] Although it had long been obsolete as a personal computer CPU, Intel and others had continued making the chip for embedded systems. Such systems using an i386 or one of many derivatives are common in aerospace technology and electronic musical instruments, among others. Some mobile phones also used (later fully static CMOS variants of) the i386 processor, such as the BlackBerry 950^[17] and Nokia 9000 Communicator. Linux continued to support i386 processors until December 11, 2012, when the kernel cut 386-specific instructions in version 3.8.^[18]

Architecture

The processor was a significant evolution in the

The 80386 featured three operating modes: real mode, protected mode and virtual mode. The protected mode, which debuted in the 286, was extended to allow the 386 to address up to 4 GB of memory. With the addition of segmented addressing system, it can expand up to 64 terabytes of virtual memory.^[20] The all new virtual 8086 mode (or VM86) made it possible to run one or more real mode programs in a protected environment, although some programs were not compatible. It features scaled indexing and 64-bit barrel shifter.^[21]

The ability for a 386 to be set up to act like it had a flat memory model in protected mode despite the fact that it uses a segmented memory model in all modes was arguably the most important feature change for the x86 processor family until the AMD released x86-64 in 2003.

Several new instructions have been added to 386: BSF, BSR, BT, BTS, BTR, BTC, CDQ, CWDE, LFS, LGS, LSS, MOVSX, MOVZX, SETcc, SHLD, SHRD.

Two new segment registers have been added (FS and GS) for general-purpose programs. The single Machine Status Word of the 286 grew into eight control registers CR0–CR7. Debug registers DR0–DR7 were added for hardware breakpoints. New forms of the MOV instruction are used to access them.

The chief architect in the development of the 80386 was

The

• Bit (Boolean value), bit field (group of up to 32 bits) and bit string (up to 4 Gbit in length).
• 8-bit integer (byte), either signed (range −128..127) or unsigned (range 0..255).
• 16-bit integer, either signed (range −32,768..32,767) or unsigned (range 0..65,535).
• 32-bit integer, either signed (range −2³¹..2³¹−1) or unsigned (range 0..2³²−1).
• Offset, a 16- or 32-bit displacement referring to a memory location (using any addressing mode).
• Pointer, a 16-bit selector together with a 16- or 32-bit offset.
• Character (8-bit character code).
• String, a sequence of 8-, 16- or 32-bit words (up to 4 Gbyte in length).^[24]
• BCD, decimal digits (0..9) represented by unpacked bytes.
• Packed BCD, two BCD digits in one byte (range 0..99).

Example code

The following i386

                         
                         
                         
                         
                         
                         
                         
                         
                         
00000000                     
00000000  55
00000001  89 E5
00000003  8B 75 0C
00000006  8B 7D 08
00000009  8A 06
0000000B  46
0000000C  3C 41
0000000E  7C 06
00000010  3C 5A
00000012  7F 02
00000014  04 20
00000016  88 07
00000018  47
00000019  3C 00
0000001B  75 EC
0000001D  5D
0000001E  C3          
0000001F          

; _strtolower:
; Copy a null-terminated ASCII string, converting
; all alphabetic characters to lower case.
;
; Entry stack parameters
;      [ESP+8] = src, Address of source string
;      [ESP+4] = dst, Address of target string
;      [ESP+0] = Return address
;
_strtolower proc
            push    ebp             ;Set up the call frame
            mov     ebp,esp
            mov     esi,[ebp+12]    ;Set ESI = src
            mov     edi,[ebp+8]     ;Set EDI = dst
loop        mov     al,[esi]        ;Load AL from [src]
            inc     esi             ;Increment src
            cmp     al,'A'          ;If AL < 'A',
            jl      copy            ; Skip conversion
            cmp     al,'Z'          ;If AL > 'Z',
            jg      copy            ; Skip conversion
            add     al,'a'-'A'      ;Convert AL to lowercase
copy        mov     [edi],al        ;Store AL to [dst]
            inc     edi             ;Increment dst
            cmp     al,0            ;If AL <> 0,
            jne     loop            ; Repeat the loop
done        pop     ebp             ;Restore the prev call frame
            ret                     ;Return to caller
            end     proc

The example code uses the EBP (base pointer) register to establish a

Prior to the 386, the difficulty of manufacturing microchips and the uncertainty of reliable supply made it desirable that any mass-market semiconductor be multi-sourced, that is, made by two or more manufacturers, the second and subsequent companies manufacturing under license from the originating company. The 386 was for a time (4.7 years) only available from Intel, since Andy Grove, Intel's CEO at the time, made the decision not to encourage other manufacturers to produce the processor as second sources. This decision was ultimately crucial to Intel's success in the market.^{[citation needed]} The 386 was the first significant microprocessor to be single-sourced. Single-sourcing the 386 allowed Intel greater control over its development and substantially greater profits in later years.

• The AMD Am386SX and Am386DX were almost exact clones of the i386SX and i386DX. Legal disputes caused production delays for several years, but AMD's 40 MHz part eventually became very popular with computer enthusiasts as a low-cost and low-power alternative to the 25 MHz 486SX. The power draw was further reduced in the "notebook models" (Am386 DXL/SXL/DXLV/SXLV), which could operate with 3.3 V and were implemented in fully static CMOS circuitry.
• Chips and Technologies Super386 38600SX and 38600DX were developed using reverse engineering. They sold poorly, due to some technical errors and incompatibilities, as well as their late appearance on the market. They were therefore short-lived products.
• Cx486DLC could be (simplistically) described as a kind of 386/486 hybrid chip that included a small amount of on-chip cache. It was popular among computer enthusiasts but did poorly with OEMs. The Cyrix Cx486SLC and Cyrix Cx486DLC processors were pin-compatible with i386SX and i386DX respectively. These processors were also manufactured and sold by Texas Instruments
  .
• 486SLC
  /DLC were variants of Intel's design which contained a large amount of on-chip cache (8 KB, and later 16 KB). The agreement with Intel limited their use to IBM's own line of computers and upgrade boards only, so they were not available on the open market.

Intel originally intended for the 80386 to debut at 16 MHz. However, due to poor yields, it was instead introduced at 12.5 MHz.[26]

Early in production, Intel discovered a marginal circuit that could cause a system to return incorrect results from 32-bit multiply operations. Not all of the processors already manufactured were affected, so Intel tested its inventory. Processors that were found to be bug-free were marked with a double sigma (ΣΣ), and affected processors were marked "16 BIT S/W ONLY".^[27] These latter processors were sold as good parts, since at the time 32-bit capability was not relevant for most users.^[28]

The

• 
  A very early 80386 at 12 MHz (A80386-12), before the 32-bit multiply bug was found
• 
  An A80386-16 marked "16 BIT S/W ONLY" with the multiply bug
• 
  A bug-free A80386-16 marked "ΣΣ"

Pin-compatible upgrades

Intel later offered a modified version of its 486DX in i386 packaging, branded as the Intel RapidCAD. This provided an upgrade path for users with i386-compatible hardware. The upgrade was a pair of chips that replaced both the i386 and i387. Since the 486DX design contained an FPU, the chip that replaced the i386 contained the floating-point functionality, and the chip that replaced the i387 served very little purpose. However, the latter chip was necessary in order to provide the FERR signal to the mainboard and appear to function as a normal floating-point unit.

Third parties offered a wide range of upgrades, for both SX and DX systems. The most popular ones were based on the Cyrix 486DLC/SLC core, which typically offered a substantial speed improvement due to its more efficient instruction pipeline and internal L1 SRAM cache. The cache was usually 1 KB, or sometimes 8 KB in the TI variant. Some of these upgrade chips (such as the 486DRx2/SRx2) were marketed by Cyrix themselves, but they were more commonly found in kits offered by upgrade specialists such as Kingston, Evergreen Technologies and Improve-It Technologies. Some of the fastest CPU upgrade modules featured the IBM SLC/DLC family (notable for its 16 KB L1 cache), or even the Intel 486 itself. Many 386 upgrade kits were advertised as being simple drop-in replacements, but often required complicated software to control the cache or clock doubling. Part of the problem was that on most 386 motherboards, the A20 line was controlled entirely by the motherboard with the CPU being unaware, which caused problems on CPUs with internal caches.

Overall, it was very difficult to configure upgrades to produce the results advertised on the packaging, and upgrades were often not very stable or not fully compatible.

Models and variants

Early 5 V models

i386DX

Original version, released in October 1985. The 16 MHz version was available for 299 USD in quantities of 100.^[29] The 20 MHz version was available for US$599 in quantities of 100.^[11] The 33 Mhz version was available on April 10, 1989.^[14]

• Capable of working with 16- or 32-bit external busses
• Package:
  PGA-132 which was available in sampling for fourth quarter of 1985^[30]
  or PQFP-132
• Process: First types CHMOS III, 1.5 µm, later CHMOS IV, 1 µm
• Die size: 104 mm² (ca. 10 mm × 10 mm) in CHMOS III and 39 mm² (6 mm × 6.5 mm) in CHMOS IV.
• Transistor count: 275,000^[2][14]
• Specified max clock: 12 MHz (early models), later 16, 20, 25 and 33 MHz

M80386

The military version was made using the CHMOS III process technology. It was made to withstand 105

The 16 MHz 386SX contains the 100-lead BQFP. It was available for USD $165 in quantites of 1000. It has the performance of 2.5 to 3 MIPS as well.[12] The low-power version was available on April 10, 1989. This version that uses 20 to 30 percent less power and has higher operating temperature up to 100 °C than the regular version.^[14]

• 
  80386SX 16 MHz
• 
  A surface-mount version of Intel 80386SX processor in a Compaq Deskpro computer. It is non-upgradable unless hot-air circuit-board rework is performed
• 
  Die of Intel 80386SX

80386SL

The 80386SL was introduced as a power-efficient version for

Dave Vannier, the chief architect designed this microprocessor. It took them two years to complete this design since it uses the existing 386 architecture to implement. That assist with advanced computer-aided design tools which includes a complete simulation of system board. This die contains the 386 CPU core, AT Bus Controller, Memory Controller, Internal Bus Controller, Cache Control Logic along with Cache Tag SRAM and Clock. This CPU contains 855,000 transistors using one-micron CHMOS IV technology. It was available for USD $176 in 1,000 unit in quantities.[3] The 25-MHz version was available in samples for USD $189 in 1,000-piece quantities, but that version will be available in production by end of 1991.^[35]

• 
  i386SL from 1990

SnapIn 386

In the fall of 1991, Intel introduced an upgrade for these IBM PS/2 Model 50 and 60 system which contains 80286 microprocessor converting to full blown 32-bit system. The SnapIn 386 module is a daughtercard with 20-MHz 386SX and 16-Kbyte direct-mapped cache SRAM memory. It directly plugs into the existing 286 socket with no cables, jumpers or switches. It was available for USD $495.^[36]

RapidCAD

A specially packaged

Versions for embedded systems

80376

This was an embedded version of the 80386SX which did not support real mode and paging in the MMU.

i386EX, i386EXTB and i386EXTC

System and power management and built in peripheral and support functions: Two 82C59A interrupt controllers; Timer, Counter (3 channels); Asynchronous SIO (2 channels); Synchronous SIO (1 channel); Watchdog timer (Hardware/Software); PIO. Usable with 80387SX or i387SL FPUs.

• Data/address bus: 16 / 26 bits
• Package:
  SQFP
  -144 and PGA-168
• Process: CHMOS V, 0.8 µm
• Specified max clock:
  • i386EX: 16 MHz @2.7–3.3 volts or 20 MHz @3.0–3.6 volts or 25 MHz @4.5–5.5 volts
  • i386EXTB: 20 MHz @2.7–3.6 volts or 25 MHz @3.0–3.6 volts
  • i386EXTC: 25 MHz @4.5–5.5 volts or 33 MHz @4.5–5.5 volts

i386CXSA and i386SXSA (or i386SXTA)

Transparent power management mode, integrated

• Data/address bus: 16 / 26 bits (24 bits for i386SXSA)
• Package:
  BQFP
  -100
• Voltage: 4.5–5.5 volts (25 and 33 MHz); 4.75–5.25 volts (40 MHz)
• Process: CHMOS V, 0.8 µm
• Specified max clock: 25, 33, 40 MHz

i386CXSB

Transparent power management mode and integrated

• Data/address bus: 16 / 26 bits
• Package:
  BQFP
  -100
• Voltage: 3.0 volts (16 MHz) or 3.3 volts (25 MHz)
• Process: CHMOS V, 0.8 µm
• Specified max clock: 16, 25 MHz

Obsolescence

Windows 95 was the only entry in the Windows 9x series to officially support the 386, requiring at least a 386DX, though a 486 or better was recommended;^[37] Windows 98 requires a 486DX or higher.^[38] In the Windows NT family, Windows NT 3.51 was the last version with 386 support.^[39][40]

Debian GNU/Linux dropped 386 support with the release of 3.1 (Sarge) in 2005 and completely removed support in 2007 with 4.0 (Etch).^[41][42] Citing the maintenance burden around SMP primitives, the Linux kernel developers cut support from the development codebase in December 2012, later released as kernel version 3.8.^[18]

Among the BSDs, FreeBSD's 5.x releases were the last to support the 386; support for the 386SX was cut with release 5.2,^[43] while the remaining 386 support was removed with the 6.0 release in 2005.^[44] OpenBSD removed 386 support with version 4.2 (2007),^[45] DragonFly BSD with release 1.12 (2008),^[46] and NetBSD with the 5.0 release (2009).^[47]

See also

• List of Intel microprocessors

Notes