Itanium
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Itanium (
When first released in 2001, Itanium's performance was disappointing compared to better-established
In February 2017, Intel released the final generation, Kittson, to test customers, and in May began shipping in volume.[7][8] It was used exclusively in mission-critical servers from HPE.
In 2019, Intel announced that new orders for Itanium would be accepted until January 30, 2020, and shipments would cease by July 29, 2021.[1] This took place on schedule.[9]
Itanium never sold well outside enterprise servers and high-performance computing systems, and the architecture was ultimately supplanted by competitor AMD's
History
Development: 1989–2001
Inception: 1989–1994
In 1989, HP started to research an architecture that would exceed the expected limits of the
HP researchers modified the classic VLIW into a new type of architecture, later named
At the same time Intel was also looking for ways to make better ISAs. In 1989 Intel had launched the i860, which it marketed for workstations, servers, and iPSC and Paragon supercomputers. It differed from other RISCs by being able to switch between the normal single instruction per cycle mode, and a mode where pairs of instructions are explicitly defined as parallel so as to execute them in the same cycle without having to do dependency checking. Another distinguishing feature were the instructions for an exposed floating-point pipeline, that enabled the tripling of throughput compared to the conventional floating-point instructions. Both of these features were left largely unused because compilers didn't support them, a problem that later challenged Itanium too. Without them, i860's parallelism (and thus performance) was no better than other RISCs, so it failed in the market. Itanium would adopt a more flexible form of explicit parallelism than i860 had.[16]
In November 1993 HP approached Intel, seeking collaboration on an innovative future architecture.[17][19] At the time Intel was looking to extend x86 to 64 bits in a processor codenamed P7, which they found challenging.[20] Later Intel claimed that four different design teams had explored 64-bit extensions, but each of them concluded that it was not economically feasible.[21] At the meeting with HP, Intel's engineers were impressed when Jerry Huck and Rajiv Gupta presented the PA-WideWord architecture they had designed to replace PA-RISC. "When we saw WideWord, we saw a lot of things we had only been looking at doing, already in their full glory", said Intel's John Crawford, who in 1994 became the chief architect of Merced, and who had earlier argued against extending the x86 with P7. HP's Gupta recalled: "I looked Albert Yu [Intel's general manager for microprocessors] in the eyes and showed him we could run circles around PowerPC, that we could kill PowerPC, that we could kill the x86."[22] Soon Intel and HP started conducting in-depth technical discussions at a HP office, where each side had six[25] engineers who exchanged and discussed both companies' confidential architectural research. They then decided to use not only PA-WideWord, but also the more experimental HP Labs PlayDoh as the source of their joint future architecture.[12][26] Convinced of the superiority of the new project, in 1994 Intel canceled their existing plans for P7.
In June 1994 Intel and HP announced their joint effort to make a new ISA that would adopt ideas of Wide Word and VLIW. Yu declared: "If I were competitors, I'd be really worried. If you think you have a future, you don't."[22] On P7's future, Intel said the alliance would impact it, but "it is not clear" whether it would "fully encompass the new architecture".[27][28] Later the same month, Intel said that some of the first features of the new architecture would start appearing on Intel chips as early as the P7, but the full version would appear sometime later.[29] In August 1994 EE Times reported that Intel told investors that P7 was being re-evaluated and possibly canceled in favor of the HP processor. Intel immediately issued a clarification, saying that P7 is still being defined, and that HP may contribute to its architecture. Later it was confirmed that the P7 codename had indeed passed to the HP-Intel processor. By early 1996 Intel revealed its new codename, Merced.[30][31]
HP believed that it was no longer cost-effective for individual enterprise systems companies such as itself to develop proprietary microprocessors, so it partnered with Intel in 1994 to develop the IA-64 architecture, derived from EPIC. Intel was willing to undertake the very large development effort on IA-64 in the expectation that the resulting microprocessor would be used by the majority of enterprise systems manufacturers. HP and Intel initiated a large joint development effort with a goal of delivering the first product, Merced, in 1998.[14]
Design and delays: 1994–2001
Merced was designed by a team of 500, which Intel later admitted was too inexperienced, with many recent college graduates. Crawford (Intel) was the chief architect, while Huck (HP) held the second position. Early in the development HP and Intel had a disagreement where Intel wanted more dedicated hardware for more floating-point instructions. HP prevailed upon the discovery of
The expectations for Merced waned over time as delays and performance deficiencies emerged, shifting the focus and onus for success onto the HP-led second Itanium design, codenamed McKinley. In July 1997 the switch to the 180 nm process delayed Merced into the second half of 1999.[32] Shortly before the reveal of EPIC at the Microprocessor Forum in October 1997, an analyst of the Microprocessor Report said that Itanium would "not show the competitive performance until 2001. It will take the second version of the chip for the performance to get shown".[33] At the Forum, Intel's Fred Pollack originated the "wait for McKinley" mantra when he said that it would double the Merced's performance and would "knock your socks off",[34][35] while using the same 180 nm process as Merced.[36] Pollack also said that Merced's x86 performance would be lower than the fastest x86 processors, and that x86 would "continue to grow at its historical rates".[34] Intel said that IA-64 won't have much presence in the consumer market for 5 to 10 years.[37]
Later it was reported that HP's motivation when starting to design McKinley in 1996 was to have more control over the project so as to avoid the issues affecting Merced's performance and schedule.[38][39] The design team finalized McKinley's project goals in 1997.[40] In late May 1998 Merced was delayed to mid-2000, and by August 1998 analysts were questioning its commercial viability, given that McKinley would arrive shortly after with double the performance, as delays were causing Merced to turn into simply a development vehicle for the Itanium ecosystem. The "wait for McKinley" narrative was becoming prevalent.[41] The same day it was reported that due to the delays, HP would extend its line of PA-RISC PA-8000 series processors from PA-8500 to as far as PA-8900.[42] In October 1998 HP announced its plans for four more generations of PA-RISC processors, with PA-8900 set to reach 1.2 GHz in 2003.[43]
By March 1999 some analysts expected Merced to ship in volume only in 2001, but the volume was widely expected to be low as most customers would wait for McKinley.[38] In May 1999, two months before Merced's tape-out, an analyst said that failure to tape-out before July would result in another delay.[44] In July 1999, upon reports that the first silicon would be made in late August, analysts predicted a delay to late 2000, and came into agreement that Merced would be used chiefly for debugging and testing the IA-64 software. Linley Gwennap of MPR said of Merced that "at this point, everyone is expecting it's going to be late and slow, and the real advance is going to come from McKinley. What this does is puts a lot more pressure on McKinley and for that team to deliver".[45] By then, Intel had revealed that Merced would be initially priced at $5000.[46] In August 1999 HP advised some of their customers to skip Merced and wait for McKinley.[47] By July 2000 HP told the press that the first Itanium systems would be for niche uses, and that "You're not going to put this stuff near your data center for several years."; HP expected its Itanium systems to outsell the PA-RISC systems only in 2005.[48] The same July Intel told of another delay, due to a stepping change to fix bugs. Now only "pilot systems" would ship that year, while the general availability was pushed to the "first half of 2001". Server makers had largely forgone spending on the R&D for the Merced-based systems, instead using motherboards or whole servers of Intel's design. To foster a wide ecosystem, by mid-2000 Intel had provided 15,000 Itaniums in 5,000 systems to software developers and hardware designers.[49] In March 2001 Intel said Itanium systems would begin shipping to customers in the second quarter, followed by a broader deployment in the second half of the year. By then even Intel publicly acknowledged that many customers would wait for McKinley.[50]
Expectations
During development, Intel, HP, and industry analysts predicted that IA-64 would dominate first in 64-bit servers and workstations, then expand to the lower-end servers, supplanting Xeon, and finally penetrate into the
Several groups ported operating systems for the architecture, including
Tru64 UNIX,[60] and Monterey/64.[64] The latter three were canceled before reaching the market. By 1997, it was apparent that the IA-64 architecture and the compiler were much more difficult to implement than originally thought, and the delivery timeframe of Merced began slipping.[45]Intel announced the official name of the processor, Itanium, on October 4, 1999.[65] Within hours, the name Itanic had been coined on a
Itanium (Merced): 2001
General information | |
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Launched | 29 May–June 2001 |
Discontinued | 10 April 2003[71] |
Common manufacturer(s) |
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Performance | |
Max. CPU clock rate | 733 to 800 MHz |
FSB speeds | 266 MT/s |
Cache | |
L2 cache | 96 KB |
L3 cache | 2 or 4 MB |
Physical specifications | |
Cores |
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Socket(s) |
After having sampled 40,000 chips to the partners, Intel launched Itanium on May 29, 2001, with first OEM systems from HP, IBM and Dell shipping to customers in June.[72][73] By then Itanium's performance was not superior to competing RISC and CISC processors.[74] Itanium competed at the low-end (primarily four-CPU and smaller systems) with servers based on x86 processors, and at the high-end with IBM POWER and Sun Microsystems SPARC processors. Intel repositioned Itanium to focus on the high-end business and HPC computing markets, attempting to duplicate the x86's successful "horizontal" market (i.e., single architecture, multiple systems vendors). The success of this initial processor version was limited to replacing the PA-RISC in HP systems, Alpha in Compaq systems and MIPS in SGI systems, though IBM also delivered a supercomputer based on this processor.[75] POWER and SPARC remained strong, while the 32-bit x86 architecture continued to grow into the enterprise space, building on the economies of scale fueled by its enormous installed base.
Only a few thousand systems using the original Merced Itanium processor were sold, due to relatively poor performance, high cost and limited software availability.[76] Recognizing that the lack of software could be a serious problem for the future, Intel made thousands of these early systems available to independent software vendors (ISVs) to stimulate development. HP and Intel brought the next-generation Itanium 2 processor to the market a year later. Few of the microarchitectural features of Merced would be carried over to all the subsequent Itanium designs, including the 16+16 KB L1 cache size and the 6-wide (two-bundle) instruction decoding.
Itanium 2 (McKinley and Madison): 2002–2006
130 nm | |
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Cores |
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Socket(s) |
The Itanium 2 processor was released in July 2002, and was marketed for enterprise servers rather than for the whole gamut of high-end computing. The first Itanium 2, code-named McKinley, was jointly developed by HP and Intel, led by the HP team at Fort Collins, Colorado, taping out in December 2000. It relieved many of the performance problems of the original Itanium processor, which were mostly caused by an inefficient memory subsystem by approximately halving the latency and doubling the fill bandwidth of each of the three levels of cache, while expanding the L2 cache from 96 to 256 KB. Floating-point data is excluded from the L1 cache, because the L2 cache's higher bandwidth is more beneficial to typical floating-point applications than low latency. The L3 cache is now integrated on-chip rather than on a separate die, tripling in associativity and doubling in bus width. McKinley also greatly increases the number of possible instruction combinations in a VLIW-bundle and reaches 25% higher frequency, despite having only eight pipeline stages versus Merced's ten.[81][40]
McKinley contains 221 million transistors (of which 25 million are for logic and 181 million for L3 cache), measured 19.5 mm by 21.6 mm (421 mm2) and was fabricated in a 180 nm, bulk CMOS process with six layers of aluminium metallization.[82][83][84] In May 2003 it was disclosed that some McKinley processors can suffer from a critical-path erratum leading to a system's crashing. It can be avoided by lowering the processor frequency to 800 MHz.[85]
In 2003,
In 2003 Intel released a new Itanium 2 family member, codenamed Madison, initially with up to 1.5 GHz frequency and 6 MB of L3 cache. The Madison 9M chip released in November 2004 had 9 MB of L3 cache and frequency up to 1.6 GHz, reaching 1.67 GHz in July 2005. Both chips used a 130 nm process and were the basis of all new Itanium processors until Montecito was released in July 2006, specifically Deerfield being a low wattage Madison, and Fanwood being a version of Madison 9M for lower-end servers with one or two CPU sockets.
In November 2005, the major Itanium server manufacturers joined with Intel and a number of software vendors to form the Itanium Solutions Alliance to promote the architecture and accelerate the software porting effort.[86] The Alliance announced that its members would invest $10 billion in the Itanium Solutions Alliance by the end of the decade.[87]
Itanium 2 9000 and Itanium 9100: 2006 and 2007
90 nm | |
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Cores |
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Socket(s) |
In early 2003, due to the success of IBM's dual-core
Intel released the Itanium 9100 series, codenamed Montvale, in November 2007, retiring the "Itanium 2" brand.
Itanium 9300 (Tukwila): 2010
General information | |
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Launched | 8 February 2010 |
Discontinued | 2nd quarter of 2014 |
Performance | |
Max. LGA1248 ) |
General information | |
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Launched | 8 November 2012 |
Discontinued | 30 January 2020 LGA1248 ) |
The original code name for the first Itanium with more than two cores was Tanglewood, but it was changed to Tukwila in late 2003 due to trademark issues.[99][100] Intel discussed a "middle-of-the-decade Itanium" to succeed Montecito, achieving ten times the performance of Madison.[101][90] It was being designed by the famed DEC Alpha team and was expected have eight new multithreading-focused cores. Intel claimed "a lot more than two" cores and more than seven times the performance of Madison.[102][103][104] In early 2004 Intel told of "plans to achieve up to double the performance over the Intel Xeon processor family at platform cost parity by 2007".[105] By early 2005 Tukwila was redefined, now having fewer cores but focusing on single-threaded performance and multiprocessor scalability.[106]
In March 2005, Intel disclosed some details of Tukwila, the next Itanium processor after Montvale, to be released in 2007. Tukwila would have
The device uses a 65 nm process, includes two to four cores, up to 24
HP vs. Oracle
During the 2012 Hewlett-Packard Co. v. Oracle Corp. support lawsuit, court documents unsealed by a Santa Clara County Court judge revealed that in 2008, Hewlett-Packard had paid Intel around $440 million to keep producing and updating Itanium microprocessors from 2009 to 2014. In 2010, the two companies signed another $250 million deal, which obliged Intel to continue making Itanium CPUs for HP's machines until 2017. Under the terms of the agreements, HP had to pay for chips it gets from Intel, while Intel launches Tukwila, Poulson, Kittson, and Kittson+ chips in a bid to gradually boost performance of the platform.[115][116]
Itanium 9500 (Poulson): 2012
Intel first mentioned Poulson on March 1, 2005, at the Spring
At ISSCC 2011, Intel presented a paper called "A 32nm 3.1 Billion Transistor 12-Wide-Issue Itanium Processor for Mission Critical Servers."[119][120] Analyst David Kanter speculated that Poulson would use a new microarchitecture, with a more advanced form of multithreading that uses up to two threads, to improve performance for single threaded and multithreaded workloads.[121] Some information was also released at the
Information presented improvements in multithreading, resiliency improvements (
Poulson was released on November 8, 2012, as the Itanium 9500 series processor. It is the follow-on processor to Tukwila. It features eight cores and has a 12-wide issue architecture, multithreading enhancements, and new instructions to take advantage of parallelism, especially in virtualization.[112][124][125] The Poulson L3 cache size is 32 MB and common for all cores, not divided like previously. L2 cache size is 6 MB, 512 I
Intel's Product Change Notification (PCN) 111456-01 lists four models of Itanium 9500 series CPU, which was later removed in a revised document.[128] The parts were later listed in Intel's Material Declaration Data Sheets (MDDS) database.[129] Intel later posted Itanium 9500 reference manual.[130]
The models are the following:[128][131]
Processor number Frequency Cache 9520 1.73 GHz 20MB 9540 2.13 GHz 24MB 9550 2.40 GHz 32MB 9560 2.53 GHz 32MB
Itanium 9700 (Kittson): 2017
Intel had committed to at least one more generation after Poulson, first mentioning Kittson on 14 June 2007.
In April 2015, Intel, although it had not yet confirmed formal specifications, did confirm that it continued to work on the project.[136] Meanwhile, the aggressively multicore Xeon E7 platform displaced Itanium-based solutions in the Intel roadmap.[137] Even Hewlett-Packard, the main proponent and customer for Itanium, began selling x86-based Superdome and NonStop servers, and started to treat the Itanium-based versions as legacy products.[138][139]
Intel officially launched the Itanium 9700 series processor family on May 11, 2017.[140][8] Kittson has no microarchitecture improvements over Poulson; despite nominally having a different stepping, it is functionally identical with the 9500 series, even having exactly the same bugs, the only difference being the 133 MHz higher frequency of 9760 and 9750 over 9560 and 9550 respectively.[141][142]
Intel announced that the 9700 series would be the last Itanium chips produced.[7][8]
The models are:[143]
Processor number Cores Threads Frequency Cache 9720 4 8 1.73 GHz 20 MB 9740 8 16 2.13 GHz 24 MB 9750 4 8 2.53 GHz 32 MB 9760 8 16 2.66 GHz 32 MB
In comparison with its Xeon family of server processors, Itanium was never a high-volume product for Intel. Intel does not release production numbers, but one industry analyst estimated that the production rate was 200,000 processors per year in 2007.[144]
According to
In December 2012, IDC released a research report stating that Itanium server shipments would remain flat through 2016, with annual shipment of 26,000 systems (a decline of over 50% compared to shipments in 2008).[147]
Hardware support
Systems
Company | Last product | |||
---|---|---|---|---|
name | from | to | name | CPUs |
HP/HPE | 2001 | 2021 | Integrity | 1–256 |
Compaq | 2001 | 2002 | ProLiant 590 | 1–4 |
IBM | 2001 | 2005 | System x455 | 1–16 |
Dell | 2001 | PowerEdge 7250 |
1–4 | |
Hitachi | 2001 | 2008 | BladeSymphony 1000 |
1–8 |
Unisys | 2002 | 2009 | ES7000/one | 1–32 |
SGI | 2001 | 2011 | Altix 4000 | 1–2048 |
Fujitsu | 2005 | PRIMEQUEST | 1–32 | |
Bull | 2002 | pre-2015 | NovaScale 9410 | 1–32 |
NEC | 2002 | 2012 | nx7700i | 1–256 |
Inspur | 2010 | pre-2015 | TS10000 | 2–1024 |
Huawei | 2012 | pre-2015 | ? | ? |
By 2006, HP manufactured at least 80% of all Itanium systems, and sold 7,200 in the first quarter of 2006.[148] The bulk of systems sold were
By 2012, only a few manufacturers offered Itanium systems, including
By 2015, only HP supplied Itanium-based systems.
Chipsets
Prior to the 9300-series (
The "Tukwila" Itanium processor model had been designed to share a common chipset with the Intel Xeon processor EX (Intel's Xeon processor designed for four processor and larger servers). The goal was to streamline system development and reduce costs for server OEMs, many of which develop both Itanium- and Xeon-based servers. However, in 2013, this goal was pushed back to be "evaluated for future implementation opportunities".[154]
In the times before on-chip memory controllers and
Neither Intel nor IBM would develop Itanium 2 chipsets to support newer technologies such as DDR2 or PCI Express.[155] Before "Tukwila" moved away from the FSB, chipsets supporting such technologies were manufactured by all Itanium server vendors, such as HP, Fujitsu, SGI, NEC, and Hitachi.
Intel
The first generation of Itanium received no vendor-specific chipsets, only Intel's 460GX consisting of ten distinct chips. It supported up to four CPUs and 64 GB of memory at 4.2 GB/s, which is twice the system bus's bandwidth. Addresses and data were handled by two different chips. 460GX had an AGP X4 graphics bus, two 64-bit 66 MHz PCI buses and configurable 33 MHz dual 32-bit or single 64-bit PCI bus(es).[156]
There were many custom chipset designs for Itanium 2, but many smaller vendors chose to use Intel's E8870 chipset. It supports 128 GB of
Hewlett-Packard
HP has designed four different chipsets for Itanium 2: zx1, sx1000, zx2 and sx2000. All support 4 sockets per chipset, but sx1000 and sx2000 support interconnection of up to 16 chipsets to create up to a 64 socket system. As it was developed in collaboration with Itanium 2's development, booting the first Itanium 2 in February 2001,[164] zx1 became the first Itanium 2 chipset available and later in 2004 also the first to support 533 MT/s FSB. In its basic two-chip version it directly provides four channels of DDR-266 memory, giving 8.5 GB/s of bandwidth and 32 GB of capacity (though 12 DIMM slots).[165] In versions with memory expander boards memory bandwidth reaches 12.8 GB/s, while the maximum capacity for the initial two-board 48 DIMM expanders was 96 GB, and the later single-board 32 DIMM expander up to 128 GB. The memory latency increases by 25 nanoseconds from 80 ns due to the expanders. Eight independent links went to the PCI-X and other peripheral devices (e.g. AGP in workstations), totaling 4 GB/s.[166][167]
HP's first high-end Itanium chipset was sx1000, launched in mid-2003 with the Integrity Superdome flagship server. It has two independent front-side buses, each bus supporting two sockets, giving 12.8 GB/s of combined bandwidth from the processors to the chipset. It has four links to data-only memory buffers and supports 64 GB of HP-designed 125 MHz memory at 16 GB/s. The above components form a system board called a cell. Two cells can be directly connected together to create an 8-socket glueless system. To connect four cells together, a pair of 8-ported crossbar switches is needed (adding 64 ns to inter-cell memory accesses), while four such pairs of crossbar switches are needed for the top-end system of 16 cells (64 sockets), giving 32 GB/s of bisection bandwidth. Cells maintain cache coherence through in-memory directories, which causes the minimum memory latency to be 241 ns. The latency to the most remote (NUMA) memory is 463 ns. The per-cell bandwidth to the I/O subsystems is 2 GB/s, despite the presence of 8 GB/s worth of PCI-X buses in each I/O subsystem.[168][169][170]
HP launched sx2000 in March 2006 to succeed sx1000. Its two FSBs operate at 533 MT/s. It supports up to 128 GB of memory at 17 GB/s. The memory is of HP's custom design, using the
HP launched the first zx2-based servers in September 2006. zx2 can operate the FSB at 667 MT/s with two CPUs or 533 MT/s with four CPUs. It connects to the DDR2 memory either directly, supporting 32 GB at up to 14.2 GB/s, or through expander boards, supporting up to 384 GB at 17 GB/s. The minimum open-page latency is 60 to 78 ns. 9.8 GB/s are available through eight independent links to the I/O adapters, which can include PCIe ×8 or 266 MHz PCI-X.[172][173]
Others
In May 2003, IBM launched the XA-64 chipset for Itanium 2. It used many of the same technologies as the first two generations of XA-32 chipsets for
Software support
Unix
- HP-UX 11 (supported until 2025)
BSD
- NetBSD (a tier II port[182] that "is a work-in-progress effort to port NetBSD to the Itanium family of processors. Currently no formal release is available."[183])
- FreeBSD (unsupported since 31 October 2018)
Linux
The Trillian Project was an effort by an industry consortium to port the
- the open source GCCcompiler had already been enhanced to support the Itanium architecture.
- a free and open source simulator had been developed to simulate an Itanium processor on an existing computer.[186]
After the successful completion of Project Trillian, the resulting Linux kernel was used by all of the manufacturers of Itanium systems (HP, IBM, Dell, SGI, Fujitsu, Unisys, Hitachi, and Groupe Bull). With the notable exception of HP, Linux is either the primary OS or the only OS the manufacturer supports for Itanium. Ongoing free and open source software support for Linux on Itanium subsequently coalesced at Gelato.
Distribution support
In 2005, Fedora Linux started adding support for Itanium[187] and Novell added support for SUSE Linux.[188] In 2007, CentOS added support for Itanium in a new release.[189]
- Gentoo Linux[190] (still supported)
- Debian (official support was dropped in Debian 8; unofficial support available through Debian Ports[191])
- Red Hat Enterprise Linux (unsupported since RHEL 6, had support in RHEL 5 until 2017, which supported other platforms until November 30, 2020)
- SUSE Linux11 (supported until 2019, for other platforms SUSE 11 was supported until 2022).
Deprecation
In 2009, Red Hat dropped Itanium support in Enterprise Linux 6.[192] Ubuntu 10.10 dropped support for Itanium.[193] In 2021, Linus Torvalds marked the Itanium code as orphaned. Torvalds said:
"HPE no longer accepts orders for new Itanium hardware, and Intel stopped accepting orders a year ago. While intel is still officially shipping chips until July 29, 2021, it's unlikely that any such orders actually exist.
Support for Itanium was removed in Linux 6.7.[196][197]
Microsoft Windows
- Windows XP 64-Bit Edition(unsupported since June 30, 2005)
- Windows Server 2003 (unsupported since July 14, 2015)
- Windows Server 2008 (unsupported since January 14, 2020, paid Extended Security Updates not available on Itanium)
- Windows Server 2008 R2 (unsupported since January 14, 2020, paid Extended Security Updates not available on Itanium; last Windows version to support Itanium processors)
OpenVMS
In 2001, Compaq announced that OpenVMS would be ported to the Itanium architecture.[198] This led to the creation of the V8.x releases of OpenVMS, which support both Itanium-based HPE Integrity Servers and DEC Alpha hardware.[199] Since the Itanium porting effort began, ownership of OpenVMS transferred from Compaq to HP in 2001, and then to VMS Software Inc. (VSI) in 2014.[200] Noteworthy releases include:
- V8.0 (2003) - First pre-production release of OpenVMS on Itanium available outside HP.[199]
- V8.2 (2005) - First production-grade release of OpenVMS on Itanium.[199]
- V8.4 (2010) - Final release of OpenVMS supported by HP. Support ended on December 31, 2020.[201]
- V8.4-2L3 (2021) - Final release of OpenVMS on Itanium supported by VSI. Support ends on December 31, 2028.[202]
Support for Itanium has been dropped in the V9.x releases of OpenVMS, which run on x86-64 only.[202]
NonStop OS
Compiler
GNU Compiler Collection deprecated support for IA-64 in GCC 10, after Intel announced the planned phase-out of this ISA.[206] LLVM (Clang) dropped Itanium support in version 2.6.[207]
Virtualization and emulation
HP sells a virtualization technology for Itanium called Integrity Virtual Machines.
Competition
Itanium was aimed at the
In 2005, Itanium systems accounted for about 14% of HPC systems revenue, but the percentage declined as the industry shifted to x86-64 clusters for this application.[208]
An October 2008 Gartner report on the Tukwila processor stated that "...the future roadmap for Itanium looks as strong as that of any RISC peer like Power or SPARC."[209]
Supercomputers and high-performance computing
An Itanium-based computer first appeared on the list of the TOP500 supercomputers in November 2001.[75] The best position ever achieved by an Itanium 2 based system in the list was No. 2, achieved in June 2004, when Thunder (Lawrence Livermore National Laboratory) entered the list with an Rmax of 19.94 Teraflops. In November 2004, Columbia entered the list at No. 2 with 51.8 Teraflops, and there was at least one Itanium-based computer in the top 10 from then until June 2007. The peak number of Itanium-based machines on the list occurred in the November 2004 list, at 84 systems (16.8%); by June 2012, this had dropped to one system (0.2%),[210] and no Itanium system remained on the list in November 2012.
Processors
Released processors
The Itanium processors show a progression in capability. Merced was a proof of concept. McKinley dramatically improved the memory hierarchy and allowed Itanium to become reasonably competitive. Madison, with the shift to a 130 nm process, allowed for enough cache space to overcome the major performance bottlenecks. Montecito, with a 90 nm process, allowed for a dual-core implementation and a major improvement in performance per watt. Montvale added three new features: core-level lockstep, demand-based switching and front-side bus frequency of up to 667 MHz.
Codename | process | Released | Clock | L2 Cache/ core |
L3 Cache/ processor |
Bus |
dies/ dev. |
cores/ die |
TDP/ dev. |
Comments |
---|---|---|---|---|---|---|---|---|---|---|
Itanium | ||||||||||
Merced | 180 nm |
2001-05-29 | 733 MHz | 96 KB | 1 MB
2 MB |
266 MHz | 1 | 1 | 116 | 2 or 4 MB off-die L3 cache |
800 MHz | 130 | 2 or 4 MB off-die L3 cache | ||||||||
Itanium 2 | ||||||||||
McKinley | 180 nm |
2002-07-08 | 900 MHz | 256 KB | 1.5 MB | 400 MHz | 1 | 1 | 90 | HW branchlong |
1 GHz | 100 | |||||||||
3 MB | | |||||||||
Madison | 130 nm |
2003-06-30 | 1.3 GHz | 3 MB | 97 | |||||
1.4 GHz | 4 MB | 91 | ||||||||
1.5 GHz | 6 MB | 107 | ||||||||
2003-09-08 | 1.4 GHz | 1.5 MB | 91 | |||||||
2004-04-13 | 3 MB | |||||||||
1.6 GHz | 99 | |||||||||
Deerfield | 2003-09-08 | 1.0 GHz | 1.5 MB | 55 | Low voltage | |||||
Hondo[211] | 2004-06 | 1.1 GHz | 4 MB | 2 | 1 | 170 | Not a product of Intel, but of HP. 32 MB L4 | |||
Fanwood | 2004-11-08 | 1.3 GHz | 3 MB | 1 | 1 | 62 | Low voltage | |||
1.6 GHz | 99 | |||||||||
533 MHz | ||||||||||
Madison 9M | 1.5 GHz | 4 MB | 400 MHz | 122 | ||||||
1.6 GHz | 6 MB | |||||||||
9 MB | ||||||||||
2005-07-05 | 1.67 GHz | 6 MB | 667 MHz | |||||||
9 MB | ||||||||||
Itanium 2 9000 series | ||||||||||
Montecito | 90 nm |
2006-07-18 | 1.4– 1.6 GHz |
256 KB (D)+ 1 MB (I) |
6–24 MB | 400– 533 MHz |
1 | 2 | 75–104 | Virtualization, Multithread, no HW IA-32 |
Itanium 9100 series | ||||||||||
Montvale |
90 nm |
2007-10-31 | 1.42– 1.66 GHz |
256 KB (D)+ 1 MB (I) |
8–24 MB | 400– 667 MHz |
1 | 1–2 | 75–104 | Core-level lockstep, demand-based switching |
Itanium 9300 series | ||||||||||
Tukwila | 65 nm |
2010-02-08 | 1.33– 1.73 GHz |
256 KB (D)+ 512 KB (I) |
10–24 MB | QPI with 4.8 GT /s |
1 | 2–4 | 130–185 | A new point-to-point processor interconnect, the Turbo Boost
|
Itanium 9500 series | ||||||||||
Poulson |
32 nm |
2012-11-08 [212] |
1.73– 2.53 GHz |
256 KB (D)+ 512 KB (I) |
20–32 MB | QPI with 6.4 GT /s |
1 | 4–8 | 130–170 | Doubled issue width (from 6 to 12 instructions per cycle), Instruction Replay technology, Dual-domain hyperthreading[213][124][214] |
Itanium 9700 series | ||||||||||
Kittson |
32 nm |
2017-05-11 [8] |
1.73– 2.66 GHz |
256 KB (D)+ 512 KB (I) |
20–32 MB | QPI with 6.4 GT /s |
1 | 4–8 | 130–170 | No architectural improvements over Poulson, 5 % higher clock for the top model |
Codename | process | Released | Clock | L2 Cache/ core |
L3 Cache/ processor |
Bus | dies/ dev. |
cores/ die |
watts/ dev. |
Comments |
List of Intel Itanium processors |
Market reception
High-end server market
When first released in 2001, Itanium's performance was disappointing compared to better-established
In a 2009 article on the history of the processor — "How the Itanium Killed the Computer Industry" — journalist John C. Dvorak reported "This continues to be one of the great fiascos of the last 50 years".[216] Tech columnist Ashlee Vance commented that the delays and underperformance "turned the product into a joke in the chip industry".[146] In an interview, Donald Knuth said "The Itanium approach...was supposed to be so terrific—until it turned out that the wished-for compilers were basically impossible to write."[217]
Both Red Hat and Microsoft announced plans to drop Itanium support in their operating systems due to lack of market interest;[218][219] however, other Linux distributions such as Gentoo and Debian remain available for Itanium. On March 22, 2011, Oracle Corporation announced that it would no longer develop new products for HP-UX on Itanium, although it would continue to provide support for existing products.[220] Following this announcement, HP sued Oracle for breach of contract, arguing that Oracle had violated conditions imposed during settlement over Oracle's hiring of former HP CEO Mark Hurd as its co-CEO, requiring the vendor to support Itanium on its software "until such time as HP discontinues the sales of its Itanium-based servers",[221] and that the breach had harmed its business. In 2012, a court ruled in favor of HP, and ordered Oracle to resume its support for Itanium. In June 2016, Hewlett Packard Enterprise (the corporate successor to HP's server business) was awarded $3 billion in damages from the lawsuit.[222][223] Oracle unsuccessfully appealed the decision to the California Court of Appeal in 2021.[224]
A former Intel official reported that the Itanium business had become profitable for Intel in late 2009.[225] By 2009, the chip was almost entirely deployed on servers made by HP, which had over 95% of the Itanium server market share,[146] making the main operating system for Itanium HP-UX. On March 22, 2011, Intel reaffirmed its commitment to Itanium with multiple generations of chips in development and on schedule.[226]
Other markets
Although Itanium did attain limited success in the niche market of high-end computing, Intel had originally hoped it would find broader acceptance as a replacement for the original x86 architecture.[227]
AMD chose a different direction, designing the less radical x86-64, a 64-bit extension to the existing x86 architecture, which Microsoft then supported, forcing Intel to introduce the same extensions in its own x86-based processors.[228] These designs can run existing 32-bit applications at native hardware speed, while offering support for 64-bit memory addressing and other enhancements to new applications.[146] This architecture has now become the predominant 64-bit architecture in the desktop and portable market. Although some Itanium-based workstations were initially introduced by companies such as SGI, they are no longer available.
Timeline
1989
- HP begins investigating EPIC.[14]
1994
- June: HP and Intel announce partnership.[229]
1995
- September: HP, Novell, and SCO announce plans for a "high volume UNIX operating system" to deliver "64-bit networked computing on the HP/Intel architecture".[230]
1996
1997
- June: IDC predicts IA-64 systems sales will reach $38bn/yr by 2001.[51]
- October: Dell announces it will use IA-64.[232]
- December: Intel and Sun announce joint effort to port Solaris to IA-64.[61][62][63]
1998
- March: SCO admits HP/SCO Unix alliance is now dead.
- June: IDC predicts IA-64 systems sales will reach $30bn/yr by 2001.[51]
- June: Intel announces Merced will be delayed, from second half of 1999 to first half of 2000.[233]
- September: IBM announces it will build Merced-based machines.[234]
- October: UNIXfor IA-64.
1999
- February: Project Trillian is formed to port Linuxto IA-64.
- August: IDC predicts IA-64 systems sales will reach $25bn/yr by 2002.[51]
- October: Intel announces the Itanium name.
- October: the term Itanic is first used in The Register.[67]
2000
- February: Project Trilliandelivers source code.
- June: IDC predicts Itanium systems sales will reach $25bn/yr by 2003.[51]
- July: Sun and Intel drop Solaris-on-Itanium plans.[235]
- August: AMD releases specification for x86-64, a set of 64-bit extensions to Intel's own x86 architecture intended to compete with IA-64. It will eventually market this under the name "AMD64".
2001
- June: IDC predicts Itanium systems sales will reach $15bn/yr by 2004.[51]
- June: Project Monterey dies.
- July: Itanium is released.
- October: IDC predicts Itanium systems sales will reach $12bn/yr by the end of 2004.[51]
- October 25:The final client version of Windows available for IA-64, Windows XP is released.
- November: IBM's 320-processor Titan NOW Cluster at National Center for Supercomputing Applications is listed on the TOP500 list at position #34.[75]
- November: Compaq delays Itanium Product release due to problems with processor.[236]
- December: Gelato is formed.
2002
- March: IDC predicts Itanium systems sales will reach $5bn/yr by end 2004.[51]
- June: Itanium 2 is released.
2003
- April: IDC predicts Itanium systems sales will reach $9bn/yr by end 2007.[51]
- April: AMD releases Opteron, the first processor with x86-64 extensions.
- June: Intel releases the "Madison" Itanium 2.
2004
- February: Intel announces it has been working on its own x86-64 implementation (which it will eventually market under the name "Intel 64").
- June: Intel releases its first processor with x86-64 extensions, a Xeon processor codenamed "Nocona".
- June: Thunder, a system at LLNL with 4096 Itanium 2 processors, is listed on the TOP500 list at position #2.[237]
- November: Columbia, an SGI Altix 3700 with 10160 Itanium 2 processors at NASA Ames Research Center, is listed on the TOP500 list at position #2.[238]
- December: Itanium system sales for 2004 reach $1.4bn.
2005
- January: HP ports OpenVMS to Itanium[239]
- February: IBM server design drops Itanium support.[155][240]
- June: An Itanium 2 sets a record Computing blade.[241]
- September: Itanium Solutions Alliance is formed.[242]
- September: Dell exits the Itanium business.[243]
- October: Itanium server sales reach $619M/quarter in the third quarter.
- October: Intel announces one-year delays for Montecito, Montvale, and Tukwila.[109]
2006
- January: Itanium Solutions Alliance announces a $10bn collective investment in Itanium by 2010.
- February: IDC predicts Itanium systems sales will reach $6.6bn/yr by 2009.[52]
- July: Intel releases the dual-core "Montecito" Itanium 2 9000 series.[244]
2007
- April: CentOS (RHEL-clone) places Itanium support on hold for the 5.0 release.[245]
- October: Intel releases the "Montvale" Itanium 2 9100 series.
- November: Intel renames the family from Itanium 2 back to Itanium.
2009
- December: Red Hat announces that it is dropping support for Itanium in the next release of its enterprise OS, Red Hat Enterprise Linux 6.[192]
2010
- February: Intel announces the "Tukwila" Itanium 9300 series.[111]
- April: Microsoft announces that Windows Server 2008 R2 will be the final version of Windows Server to support Itanium.[246]
- October: Intel announces new releases of Intel C++ Compiler and Intel Fortran Compiler for x86/x64, while Itanium support is only available in older versions.[247]
2011
- March: Oracle Corporation announces that it will stop developing application software, middleware, and Oracle Linux for the Itanium.[220]
- March: Intel and HP reiterate their support of Itanium.[248][249]
- April: Huawei and Inspur announce that they will develop Itanium servers.[250]
2012
- February: Court papers were released from a case between HP and Oracle Corporation that gave insight to the fact that HP was paying Intel $690 million to keep Itanium on life support.[251]
- SAP discontinues support for Business Objects on Itanium.[252]
- September: In response to a court ruling, Oracle reinstitutes support for Oracle software on Itanium hardware.[253]
2013
- January: Intel cancels Kittson as a 22 nm shrink of Poulson, moving it instead to its 32 nm process.[254]
- November: HP announces that its Intel 64 (x86-64) chips.[255]
2014
- July: VMS Software Inc (VSI) announces that OpenVMS will be ported to x86-64.[256]
- December: HP announces that their next generation of Superdome X and Nonstop X servers would be equipped with Intel Xeon processors, and not Itanium. While HP continues to sell and offer support for the Itanium-based Integrity portfolio, the introduction of a model based entirely on Xeon chips marks the end of an era.[257]
2017
- February: Intel ships test versions of Kittson, the first new Itanium chip since 2012.[258]
- May: Kittson formally ships in volume as the Itanium 9700 series. Intel states that Kittson is the final Itanium generation.[7]
2019
- January: Intel announces Itanium's end of life with additional orders accepted until January 2020 and last shipments no later than July 2021.[1]
2020
- Hewlett Packard Enterprise (HPE) is accepting the last orders for the latest Itanium i6 servers on December 31, 2020.[259]
2021
- February: Linus Torvalds marks the Itanium port of Linux as orphaned. "HPE no longer accepts orders for new Itanium hardware, and Intel stopped accepting orders a year ago. While Intel is still officially shipping chips until July 29, 2021, it's unlikely that any such orders actually exist. It's dead, Jim."[260]
- July 29: The last batch of Itanium processors is shipped by Intel.[150]
2023
- November: Support for Itanium is removed from the Linux kernel source code.[261]
See also
Notes
- ^ Itanium was launched on 29 May,[2][3][4][5] but the computers containing it shipped to customers in June.
- ^ Hondo is an HP product, not an Intel product
- ^ The size of the needed dependency-checking circuitry increases quadratically with the issue width.[12][13]
- ^ For comparison the 180nm Pentium III Xeon MP had a 2 MB on-die L2 cache.
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External links
- Intel Itanium
- Intel Itanium Processor Product Specifications
- HPE Integrity Servers official web page
- Some undocumented Itanium 2 microarchitectural information
- IA-64 tutorial, including code examples at the Wayback Machine (archived July 6, 2011)
- Itanium Docs at HP
- Historical background for EPIC instruction set architectures