Logic gate
A logic gate is a device that performs a
The primary way of building logic gates uses
Logic gates can be cascaded in the same way that Boolean functions can be composed, allowing the construction of a physical model of all of
Compound logic gates
History and development
The
In an 1886 letter,
From 1934 to 1936,
In 1948, Bardeen and Brattain patented an insulatedgate transistor (IGFET) with an inversion layer. Their concept, forms the basis of CMOS technology today.^{}
Symbols
There are two sets of symbols for elementary logic gates in common use, both defined in
The mutual goal of IEEE Std 911984 and IEC 61712 was to provide a uniform method of describing the complex logic functions of digital circuits with schematic symbols. These functions were more complex than simple AND and OR gates. They could be mediumscale circuits such as a 4bit counter to a largescale circuit such as a microprocessor.
IEC 61712 and its renumbered successor IEC 6061712 do not explicitly show the "distinctive shape" symbols, but do not prohibit them.^{}[20] These are, however, shown in ANSI/IEEE Std 91 (and 91a) with this note: "The distinctiveshape symbol is, according to IEC Publication 617, Part 12, not preferred, but is not considered to be in contradiction to that standard." IEC 6061712 correspondingly contains the note (Section 2.1) "Although nonpreferred, the use of other symbols recognized by official national standards, that is distinctive shapes in place of symbols [list of basic gates], shall not be considered to be in contradiction with this standard. Usage of these other symbols in combination to form complex symbols (for example, use as embedded symbols) is discouraged." This compromise was reached between the respective IEEE and IEC working groups to permit the IEEE and IEC standards to be in mutual compliance with one another.
In the 1980s, schematics were the predominant method to design both
Type  Distinctive shape (IEEE Std 91/91a1991) 
Rectangular shape (IEEE Std 91/91a1991) (IEC 6061712:1997) 
Boolean algebra between A and B  Truth table  

Singleinput gates  
Buffer

 
NOT (inverter) 
or 
 
In electronics a NOT gate is more commonly called an inverter. The circle on the symbol is called a bubble and is used in logic diagrams to indicate a logic negation between the external logic state and the internal logic state (1 to 0 or vice versa). On a circuit diagram it must be accompanied by a statement asserting that the positive logic convention or negative logic convention is being used (high voltage level = 1 or low voltage level = 1, respectively). The wedge is used in circuit diagrams to directly indicate an activelow (low voltage level = 1) input or output without requiring a uniform convention throughout the circuit diagram. This is called Direct Polarity Indication. See IEEE Std 91/91A and IEC 6061712. Both the bubble and the wedge can be used on distinctiveshape and rectangular shape symbols on circuit diagrams, depending on the logic convention used. On pure logic diagrams, only the bubble is meaningful.
 
disjunction
 
AND  or 
 
OR  or 
 
joint denial
 
NAND  or 
 
NOR  or 
 
biconditional
 
XOR  or 
 
The output of a two input exclusiveOR is true only when the two input values are different, and false if they are equal, regardless of the value. If there are more than two inputs, the output of the distinctiveshape symbol is undefined. The output of the rectangularshaped symbol is true if the number of true inputs is exactly one or exactly the number following the "=" in the qualifying symbol.  
XNOR

or 

De Morgan equivalent symbols
By use of De Morgan's laws, an AND function is identical to an OR function with negated inputs and outputs. Likewise, an OR function is identical to an AND function with negated inputs and outputs. A NAND gate is equivalent to an OR gate with negated inputs, and a NOR gate is equivalent to an AND gate with negated inputs.
This leads to an alternative set of symbols for basic gates that use the opposite core symbol (AND or OR) but with the inputs and outputs negated. Use of these alternative symbols can make logic circuit diagrams much clearer and help to show accidental connection of an active high output to an active low input or vice versa. Any connection that has logic negations at both ends can be replaced by a negationless connection and a suitable change of gate or vice versa. Any connection that has a negation at one end and no negation at the other can be made easier to interpret by instead using the De Morgan equivalent symbol at either of the two ends. When negation or polarity indicators on both ends of a connection match, there is no logic negation in that path (effectively, bubbles "cancel"), making it easier to follow logic states from one symbol to the next. This is commonly seen in real logic diagrams – thus the reader must not get into the habit of associating the shapes exclusively as OR or AND shapes, but also take into account the bubbles at both inputs and outputs in order to determine the "true" logic function indicated.
A De Morgan symbol can show more clearly a gate's primary logical purpose and the polarity of its nodes that are considered in the "signaled" (active, on) state. Consider the simplified case where a twoinput NAND gate is used to drive a motor when either of its inputs are brought low by a switch. The "signaled" state (motor on) occurs when either one OR the other switch is on. Unlike a regular NAND symbol, which suggests AND logic, the De Morgan version, a two negativeinput OR gate, correctly shows that OR is of interest. The regular NAND symbol has a bubble at the output and none at the inputs (the opposite of the states that will turn the motor on), but the De Morgan symbol shows both inputs and output in the polarity that will drive the motor.
De Morgan's theorem is most commonly used to implement logic gates as combinations of only NAND gates, or as combinations of only NOR gates, for economic reasons.
Truth tables
Output comparison of various logic gates:
Input  Output  
A  Buffer  Inverter 
0  0  1 
1  1  0 
Input  Output  
A  B  AND  NAND  OR  NOR  XOR  XNOR 
0  0  0  1  0  1  0  1 
0  1  0  1  1  0  1  0 
1  0  0  1  1  0  1  0 
1  1  1  0  1  0  0  1 
Universal logic gates
type  NAND construction  NOR construction 

NOT  
AND  
NAND  
OR  
NOR  
XOR  
XNOR 
Data storage and sequential logic
Logic gates can also be used to hold a state, allowing data storage. A storage element can be constructed by connecting several gates in a "
These logic circuits are used in computer memory. They vary in performance, based on factors of speed, complexity, and reliability of storage, and many different types of designs are used based on the application.
Manufacturing
Electronic gates
A
Electronic logic gates differ significantly from their relayandswitch equivalents. They are much faster, consume much less power, and are much smaller (all by a factor of a million or more in most cases). Also, there is a fundamental structural difference. The switch circuit creates a continuous metallic path for current to flow (in either direction) between its input and its output. The semiconductor logic gate, on the other hand, acts as a highgain voltage amplifier, which sinks a tiny current at its input and produces a lowimpedance voltage at its output. It is not possible for current to flow between the output and the input of a semiconductor logic gate.
For smallscale logic, designers now use prefabricated logic gates from families of devices such as the
An important advantage of standardized integrated circuit logic families, such as the 7400 and 4000 families, is that they can be cascaded. This means that the output of one gate can be wired to the inputs of one or several other gates, and so on. Systems with varying degrees of complexity can be built without great concern of the designer for the internal workings of the gates, provided the limitations of each integrated circuit are considered.
The output of one gate can only drive a finite number of inputs to other gates, a number called the 'fanout limit'. Also, there is always a delay, called the 'propagation delay', from a change in input of a gate to the corresponding change in its output. When gates are cascaded, the total propagation delay is approximately the sum of the individual delays, an effect which can become a problem in highspeed synchronous circuits. Additional delay can be caused when many inputs are connected to an output, due to the distributed capacitance of all the inputs and wiring and the finite amount of current that each output can provide.
Logic families
There are several
The simplest family of logic gates uses
As integrated circuits became more complex, bipolar transistors were replaced with smaller fieldeffect transistors (MOSFETs); see PMOS and NMOS. To reduce power consumption still further, most contemporary chip implementations of digital systems now use CMOS logic. CMOS uses complementary (both nchannel and pchannel) MOSFET devices to achieve a high speed with low power dissipation.
Other types of logic gates include, but are not limited to:^{[24]}
Logic family  Abbreviation  Description 

Diode logic  DL  
Tunnel diode logic  TDL  Exactly the same as diode logic but can perform at a higher speed.^{[failed verification]} 
Neon logic  NL  Uses neon bulbs or 3element neon trigger tubes to perform logic. 
Core diode logic  CDL  Performed by semiconductor diodes and small ferrite toroidal cores for moderate speed and moderate power level. 
4Layer Device Logic  4LDL  Uses thyristors and SCRs to perform logic operations where high current and or high voltages are required. 
Directcoupled transistor logic  DCTL  Uses transistors switching between saturated and cutoff states to perform logic. The transistors require carefully controlled parameters. Economical because few other components are needed, but tends to be susceptible to noise because of the lower voltage levels employed. Often considered to be the father to modern TTL logic. 
Metal–oxide–semiconductor logic  MOS  Uses complementary MOS (CMOS), and BiCMOS (bipolar CMOS).

Currentmode logic  CML  Uses transistors to perform logic but biasing is from constant current sources to prevent saturation and allow extremely fast switching. Has high noise immunity despite fairly low logic levels. 
Quantumdot cellular automata  QCA  Uses tunnelable qbits for synthesizing the binary logic bits. The electrostatic repulsive force in between two electrons in the quantum dots assigns the electron configurations (that defines state 1 or state 0) under the suitably driven polarizations. This is a transistorless, currentless, junctionless binary logic synthesis technique allowing it to have very fast operation speeds. 
Ferroelectric FET  FeFET  FeFET transistors can retain their state to speed recovery in case of a power loss.^{[25]} 
Threestate logic gates
A threestate logic gate is a type of logic gate that can have three different outputs: high (H), low (L) and highimpedance (Z). The highimpedance state plays no role in the logic, which is strictly binary. These devices are used on
In electronics, a high output would mean the output is sourcing current from the positive power terminal (positive voltage). A low output would mean the output is sinking current to the negative power terminal (zero voltage). High impedance would mean that the output is effectively disconnected from the circuit.
Nonelectronic logic gates
Nonelectronic implementations are varied, though few of them are used in practical applications. Many early electromechanical digital computers, such as the
In principle any method that leads to a gate that is
See also
 Andinverter graph
 Boolean algebra topics
 Boolean function
 Depletionload NMOS logic
 Digital circuit
 Electronic symbol
 Espresso heuristic logic minimizer
 Emittercoupled logic
 Fanout
 Fieldprogrammable gate array (FPGA)
 Flipflop (electronics)
 Functional completeness
 Integrated injection logic
 Karnaugh map
 Combinational logic
 List of 4000 series integrated circuits
 List of 7400 series integrated circuits
 Logic family
 Logic level
 Logical graph
 Magnetic logic
 NMOS logic
 Parametron
 Processor design
 Programmable logic controller (PLC)
 Programmable logic device (PLD)
 Propositional calculus
 Race hazard
 Reversible computing
 Superconducting computing
 Truth table
 Unconventional computing
References
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 ^ Luisa Bonolis; Walther Bothe and Bruno Rossi: The birth and development of coincidence methods in cosmicray physics. Am. J. Phys. 1 November 2011; 79 (11): 1133–1150.
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 ^ "Switching Theory/Relay Circuit Network Theory/Theory of Logical Mathematics". IPSJ Computer Museum. Information Processing Society of Japan.
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 ^ "1963: Complementary MOS Circuit Configuration is Invented". Computer History Museum. Retrieved 20190706.
 ^ "Graphical Symbols for Logic Diagrams". ASSIST Quick Search. Defense Logistics Agency. MILSTD806. Retrieved 20210827.
 ^ ^{a} ^{b} "Overview of IEEE Standard 911984 Explanation of Logic Symbols" (PDF). Texas Instruments Semiconductor Group. 1996. SDYZ001A.
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 ^ Rowe, Jim. "Circuit Logic – Why and How". No. December 1966. Electronics Australia.
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Further reading
 Bostock, Geoff (1988). Programmable logic devices: technology and applications. ISBN 9780070066113.
 Brown, Stephen D.; Francis, Robert J.; Rose, Jonathan; Vranesic, Zvonko G. (1992). Field Programmable Gate Arrays. ISBN 9780792392484.
External links
 Media related to Logic gates at Wikimedia Commons