Manchester computers

This is a good article. Click here for more information.
Source: Wikipedia, the free encyclopedia.

Museum of Science and Industry
in Manchester

The Manchester computers were an innovative series of stored-program electronic computers developed during the 30-year period between 1947 and 1977 by a small team at the University of Manchester, under the leadership of Tom Kilburn.[1] They included the world's first stored-program computer, the world's first transistorised computer, and what was the world's fastest computer at the time of its inauguration in 1962.[2][3][4][5]

The project began with two aims: to prove the practicality of the

computer memory based on standard cathode-ray tubes (CRTs); and to construct a machine that could be used to investigate how computers might be able to assist in the solution of mathematical problems.[6] The first of the series, the Manchester Baby, ran its first program on 21 June 1948.[2] As the world's first stored-program computer, the Baby, and the Manchester Mark 1 developed from it, quickly attracted the attention of the United Kingdom government, who contracted the electrical engineering firm of Ferranti to produce a commercial version. The resulting machine, the Ferranti Mark 1, was the world's first commercially available general-purpose computer.[7]

The collaboration with Ferranti eventually led to an industrial partnership with the computer company ICL, who made use of many of the ideas developed at the university, particularly in the design of their 2900 series of computers during the 1970s.[8][9][10]

Manchester Baby

Main article: Manchester Baby

The Manchester Baby was designed as a test-bed for the Williams tube, an early form of computer memory, rather than as a practical computer. Work on the machine began in 1947, and on 21 June 1948 the computer successfully ran its first program, consisting of 17 instructions written to find the highest proper factor of 218 (262,144) by trying every integer from 218 − 1 downwards. The program ran for 52 minutes before producing the correct answer of 217 (131,072).[11]

The Baby was 17 feet (5.2 m) in length, 7 feet 4 inches (2.24 m) tall, and weighed almost 1 

thermionic valves – 300 diodes and 250 pentodes – and had a power consumption of 3.5 kilowatts.[12] Its successful operation was reported in a letter to the journal Nature published in September 1948,[13] establishing it as the world's first stored-program computer.[14] It quickly evolved into a more practical machine, the Manchester Mark 1
.

Manchester Mark 1

Main article: Manchester Mark 1

Development of the Manchester Mark 1 began in August 1948, with the initial aim of providing the university with a more realistic computing facility.[15] In October 1948 UK Government Chief Scientist Ben Lockspeiser was given a demonstration of the prototype, and was so impressed that he immediately initiated a government contract with the local firm of Ferranti to make a commercial version of the machine, the Ferranti Mark 1.[7]

Two versions of the Manchester Mark 1 were produced, the first of which, the Intermediary Version, was operational by April 1949.

index registers, commonplace on modern computers.[18]

In June 2022 an IEEE Milestone was dedicated to the "Manchester University "Baby" Computer and its Derivatives, 1948-1951".[19]

Meg and Mercury

As a result of experience gained from the Mark 1, the developers concluded that computers would be used more in scientific roles than pure maths. They therefore embarked on the design of a new machine which would include a

core memory.[20]

Transistor Computer

Work on building a smaller and cheaper computer began in 1952, in parallel with Meg's ongoing development. Two of Kilburn's team, Richard Grimsdale and D. C. Webb, were assigned to the task of designing and building a machine using the newly developed transistors instead of valves, which became known as the Manchester TC.[21] Initially the only devices available were germanium point-contact transistors; these were less reliable than the valves they replaced but consumed far less power.[22]

Two versions of the machine were produced. The first was the world's first transistorised computer,

solid-state diodes, and had a power consumption of 150 watts. The machine[clarification needed] did however make use of valves to generate its 125 kHz clock waveforms and in the circuitry to read and write on its magnetic drum memory, so it was not the first completely transistorised computer, a distinction that went to the Harwell CADET of 1955.[26]

Problems with the reliability of early batches of transistors meant that the machine's[clarification needed] mean time between failures was about 90 minutes, which improved once the more reliable junction transistors became available.[27] The Transistor Computer's design was adopted by the local engineering firm of Metropolitan-Vickers in their Metrovick 950, in which all the circuitry was modified to make use of junction transistors. Six Metrovick 950s were built, the first completed in 1956. They were successfully deployed within various departments of the company and were in use for about five years.[23]

Muse and Atlas

Main article: Atlas (computer)

Development of MUSE – a name derived from "microsecond engine" – began at the university in 1956. The aim was to build a computer that could operate at processing speeds approaching one microsecond per instruction, one million instructions per second.[28] Mu (or µ) is a prefix in the SI and other systems of units denoting a factor of 10−6 (one millionth).

At the end of 1958 Ferranti agreed to collaborate with Manchester University on the project, and the computer was shortly afterwards renamed Atlas, with the joint venture under the control of Tom Kilburn. The first Atlas was officially commissioned on 7 December 1962, and was considered at that time to be the most powerful computer in the world, equivalent to four

IBM 7094s.[29] It was said that whenever Atlas went offline half of the UK's computer capacity was lost.[30] Its fastest instructions took 1.59 microseconds to execute, and the machine's use of virtual storage and paging allowed each concurrent user to have up to one million words of storage space available. Atlas pioneered many hardware and software concepts still in common use today including the Atlas Supervisor, "considered by many to be the first recognisable modern operating system".[31]

Two other machines were built: one for a joint

Cambridge Computer Laboratory.[30]

The University of Manchester's Atlas was decommissioned in 1971,

National Museums of Scotland
in Edinburgh.

In June 2022 an IEEE Milestone was dedicated to the "Atlas Computer and the Invention of Virtual Memory 1957–1962".[34]

MU5

The Manchester MU5 was the successor to Atlas. An outline proposal for a successor to Atlas was presented at the 1968 IFIP Conference in Edinburgh,[35] although work on the project and talks with ICT (of which Ferranti had become part) aimed at obtaining their assistance and support had begun in 1966. The new machine, later to become known as MU5, was intended to be at the top end of a range of machines and to be 20 times faster than Atlas.

In 1968 the

Science Research Council (SRC) awarded Manchester University a five-year grant of £630,466 (equivalent to £9.94 million in 2019)[a] to develop the machine and ICT, later to become ICL, made its production facilities available to the University. In that year a group of 20 people was involved in the design: 11 Department of Computer Science staff, 5 seconded ICT staff and 4 SRC supported staff. The peak level of staffing was in 1971, when the numbers, including research students, rose to 60.[36]

The most significant novel features of the MU5 processor were its instruction set and the use of associative memory to speed up operand and instruction accesses. The instruction set was designed to permit the generation of efficient object code by compilers, to allow for a pipeline organisation of the processor and to provide information to the hardware on the nature of operands, so as to allow them to be optimally buffered. Thus named variables were buffered separately from array elements, which were themselves accessed by means of named descriptors. Each descriptor included an array length which could be used in string processing instructions or to enable array bound checking to be carried out by hardware. The instruction pre-fetching mechanism used an associative jump trace to predict the outcome of impending branches.[37]

The MU5 operating system MUSS[38][39] was designed to be highly adaptable and was ported to a variety of processors at Manchester and elsewhere. In the completed MU5 system, three processors (MU5 itself, an ICL 1905E and a PDP-11), as well as a number of memories and other devices, were interconnected by a high-speed Exchange.[40][41] All three processors ran a version of MUSS. MUSS also encompassed compilers for various languages and runtime packages to support the compiled code. It was structured as a small kernel that implemented an arbitrary set of virtual machines analogous to a corresponding set of processors. The MUSS code appeared in the common segments that formed part of each virtual machine's virtual address space.

MU5 was fully operational by October 1974, coinciding with ICL's announcement that it was working on the development of a new range of computers, the 2900 series. ICL's 2980 in particular, first delivered in June 1975, owed a great deal to the design of MU5.[42] MU5 remained in operation at the University until 1982.[43] A fuller article about MU5 can be found on the Engineering and Technology History Wiki.[44]

MU6

Once MU5 was fully operational, a new project was initiated to produce its successor, MU6. MU6 was intended to be a range of processors: MU6P,[45] an advanced microprocessor architecture intended for use as a personal computer, MU6-G,[46] a high performance machine for general or scientific applications and MU6V,[47] a parallel vector processing system. A prototype model of MU6V, based on 68000 microprocessors with vector orders emulated as "extracodes" was constructed and tested but not further developed beyond this. MU6-G was built with a grant from SRC and successfully ran as a service machine in the Department between 1982 and 1987,[4] using the MUSS operating system developed as part of the MU5 project.

SpiNNaker

Main article: SpiNNaker

SpiNNaker: Spiking Neural Network Architecture is a

spiking neural networks, useful in simulating the human brain (see Human Brain Project).[50][51][52][53][54][55][56][57][58]

Summary

Chronology of developments
Year University Prototype Year Commercial Computer
1948 Manchester Baby, which evolved into the Manchester Mark 1 1951 Ferranti Mark 1
1953 Transistor computer 1956 Metrovick 950
1954 Manchester Mark II a.k.a. "Meg" 1957 Ferranti Mercury
1959 Muse 1962 Ferranti Atlas, Titan
1974 MU5 1974 ICL 2900 Series

References

  1. ^ Lavington (1998), p. 49
  2. ^
    ISSN 0958-7403, archived from the original
    on 9 January 2012, retrieved 19 April 2008
  3. ^ a b Grimsdale, Dick, "50th Birthday of Transistor Computer", curation.cs.manchester.ac.uk, retrieved 24 February 2018
  4. ^ a b "A Timeline of Manchester Computing", University of Manchester, archived from the original on 5 July 2008, retrieved 25 February 2009
  5. ^ "timeline". 5 July 2008. Archived from the original on 5 July 2008.
  6. ^ Lavington (1998), p. 7
  7. ^ a b Lavington (1998), p. 21
  8. ISBN 978-0-7190-0803-0
  9. ISBN 978-1-902505-01-5
  10. ISBN 978-0-262-68137-7
  11. ISSN 0958-7403, archived from the original
    on 9 January 2012, retrieved 19 April 2008
  12. ^ Manchester Museum of Science & Industry (2011), "The "Baby": The World's First Stored-Program Computer" (PDF), MOSI, archived from the original (PDF) on 15 February 2012, retrieved 3 April 2012
  13. S2CID 4110351, archived from the original
    on 6 April 2009, retrieved 22 January 2009
  14. ^ Napper (2000), p. 365
  15. ^ a b Lavington (1998), p. 17
  16. ^ Napper, R. B. E., "The Manchester Mark 1", University of Manchester, archived from the original on 9 February 2014, retrieved 22 January 2009
  17. ^ Lavington, S. H. (July 1977), "The Manchester Mark 1 and Atlas: a Historical Perspective" (PDF), University of Central Florida, retrieved 8 February 2009. (Reprint of the paper published in Communications of the ACM (January 1978) 21 (1)
  18. ^ Lavington (1998), p. 18
  19. ^ "Manchester University "Baby" Computer and its Derivatives, 1948-1951".
  20. ^ Lavington (1998), p. 31
  21. ^ "The "Manchester TC" transistor computer - CHM Revolution".
  22. ^ Lavington (1998), pp. 34–35
  23. ^ a b Lavington (1998), p. 37
  24. ^ Neumann, Albrecht J. (April 1955). "COMPUTERS, Overseas: 5. Manchester University - A SMALL EXPERIMENTAL TRANSISTOR DIGITAL COMPUTER". 7 (2): 16–17. {{cite journal}}: Cite journal requires |journal= (help)[dead link]
  25. ^ a b "1953: Transistorized Computers Emerge | The Silicon Engine | Computer History Museum". www.computerhistory.org. Retrieved 2 September 2019.
  26. ISSN 0963-7346
    , retrieved 7 June 2009 (subscription required)
  27. ^ Lavington (1998), pp. 36–37
  28. ^ "The Atlas", University of Manchester, archived from the original on 28 July 2012, retrieved 21 September 2010
  29. ^ Lavington (1998), p. 41
  30. ^ a b Lavington (1998), pp. 44–45
  31. ^ Lavington (1980), pp. 50–52
  32. ^ Lavington (1998), p. 43
  33. ^ Lavington (1998), p. 44
  34. ^ "Milestones:Atlas Computer and the Invention of Virtual Memory, 1957–1962".
  35. ^ Kilburn, T.; Morris, D.; Rohl, J.S.; Sumner, F.H. (1969), "A System Design Proposal", Information Processing 68, vol. 2, North Holland, pp. 806–811
  36. ^ Morris, Derrick; Ibbett, Roland N. (1979), The MU5 Computer System, Macmillan, p. 1
  37. ^ Sumner, F.H. (1974), "MU5 - An Assessment of the Design", Information Processing 74, North Holland, pp. 133–136
  38. S2CID 1962276
  39. ^ Morris & Ibbett (1979), pp. 189–211
  40. ^ Lavington, S.H.; Thomas, G.; Edwards, D.B.G. (1977), "The MU5 Multicomputer Communication System", IEEE Trans. Computers, vol. C-26, pp. 19–28
  41. ^ Morris & Ibbett (1979), pp. 132–140.
  42. ^ Buckle, John K. (1978), The ICL 2900 Series, The Macmillan Press
  43. doi:10.1109/85.759366
  44. ^ "The University of Manchester MU5 Computer System". ethw.org. 10 June 2022.
  45. doi:10.1093/comjnl/26.3.208
    .
  46. S2CID 7224504
  47. ISBN 9780818606342
  48. ^ "Themes - Department of Computer Science - The University of Manchester". www.cs.manchester.ac.uk.
  49. ^ "SpiNNaker Project - The SpiNNaker Chip". apt.cs.manchester.ac.uk. Retrieved 17 November 2018.
  50. ^ SpiNNaker Home Page, University of Manchester, retrieved 11 June 2012
  51. doi:10.1109/JPROC.2014.2304638
    .
  52. S2CID 2103654
    .
  53. ^ A million ARM cores to host brain simulator News article on the project in the EE Times
  54. PMID 17251143
    . A manifesto for the SpiNNaker project, surveying and reviewing the general level of understanding of brain function and approaches to building computer modelof the brain.
  55. S2CID 16758888
    . A description of the Globally Asynchronous, Locally Synchronous (GALS) nature of SpiNNaker, with an overview of the asynchronous communications hardware designed to transmit neural 'spikes' between processors.
  56. S2CID 3710084
    . Modelling and analysis of the SpiNNaker interconnect in a million-core machine, showing the suitability of the packet-switched network for large-scale spiking neural network simulation.
  57. PMID 21778034
    . A demonstration of SpiNNaker's ability to simulate different neural models (simultaneously, if necessary) in contrast to other neuromorphic hardware.
  58. S2CID 19083072
    . Four-chip, real-time simulation of a four-million-synapse cortical circuit, showing the extreme energy efficiency of the SpiNNaker architecture

Notes

  1. Gross Domestic Product deflator figures follow the MeasuringWorth "consistent series" supplied in Thomas, Ryland; Williamson, Samuel H. (2018). "What Was the U.K. GDP Then?". MeasuringWorth
    . Retrieved 2 February 2020.

Retrieved from "https://en.wikipedia.org/w/index.php?title=Manchester_computers&oldid=1201381086"