Routing (electronic design automation)

In

Design rules sometimes vary considerably from layer to layer. For example, the allowed width and spacing on the lower layers may be four or more times smaller than the allowed widths and spacings on the upper layers. This introduces many additional complications not faced by routers for other applications such as printed circuit board or multi-chip module design. Particular difficulties ensue if the rules are not simple multiples of each other, and when vias must traverse between layers with different rules.

Types of routers

The earliest types of EDA routers were "manual routers"—the drafter clicked a mouse on the endpoint of each line segment of each net. Modern PCB design software typically provides "interactive routers"—the drafter selects a pad and clicks a few places to give the EDA tool an idea of where to go, and the EDA tool tries to place wires as close to that path as possible without violating design rule checking (DRC). Some more advanced interactive routers have "push and shove" (aka "shove-aside" or "automoving") features in an interactive router; the EDA tool pushes other nets out of the way, if possible, in order to place a new wire where the drafter wants it and still avoid violating DRC. Modern PCB design software also typically provides "autorouters" that route all remaining unrouted connections without human intervention.

The main types of autorouters are:

• Maze router^[3][4]
  • Lee router[5]^[3][6]
  • Hadlock router^[7]
  • Flood router^[3]
• Line-probe router
  • Mikami–Tahuchi router^[8]
  • Hightower router^{[9][6][10][3]}
• Pattern router^[6][10]
• Channel router^{[11][10][6][12]}
  • Switchbox router^[12]
  • River router^[12]
  • Spine and stitch router^[13]
• Gridless router^{[14][10][6][15]}
  • Area router
  • Graph theory-based router^[16]
    • Racal-Redac / Zuken
      )
    • Allegro PCB Router
      ) (gridless since version 10)
  • Topological router
    • FreeStyle Router (aka SpeedWay, a DOS-based autorouter for P-CAD
      )
    • Eremex
      's Delta Design)
    • gEDA suite
      )
    • EAGLE 7.0
      and higher)
    • SimplifyPCB (a topological router with a focus on bundle routing with hand-routing results)[20]

How routers work

Many routers execute the following overall algorithm:

• First, determine an approximate course for each net, often by routing on a coarse grid. This step is called global routing,^[21] and may optionally include layer assignment. Global routing limits the size and complexity of the following detailed routing steps, which can be done grid square by grid square.

For detailed routing, the most common technique is rip-up and reroute aka rip-up and retry:^[3]

• Select a sequence in which the nets are to be routed.
• Route each net in sequence
• If not all nets can be successfully routed, apply any of a variety of "cleanup" methods, in which selected routings are removed, the order of the remaining nets to be routed is changed, and the remaining routings are attempted again.

This process repeats until all nets are routed or the program (or user) gives up.

An alternative approach is to treat shorts, design rule violations, obstructions, etc. on a similar footing as excess wire length—that is, as finite costs to be reduced (at first) rather than as absolutes to be avoided. This multi-pass "iterative-improvement" routing method^[22] is described by the following algorithm:

• For each of several iterative passes:
• Prescribe or adjust the weight parameters of an "objective function" (having a weight parameter value for each unit of excess wire length, and for each type of violation). E.g., for the first pass, excess wire length may typically be given a high cost, while design violations such as shorts, adjacency, etc. are given a low cost. In later passes, the relative ordering of costs is changed so that violations are high-cost, or may be prohibited absolutely.
• Select (or randomly choose) a sequence in which nets are to be routed during this pass.
• "Rip up" (if previously routed) and reroute each net in turn, so as to minimize the value of the objective function for that net. (Some of the routings will in general have shorts or other design violations.)
• Proceed to the next iterative pass until routing is complete and correct, is not further improved, or some other termination criterion is satisfied.

Most routers assign wiring layers to carry predominantly "x" or "y" directional wiring, though there have been routers which avoid or reduce the need for such assignment.^[23] There are advantages and disadvantages to each approach. Restricted directions make power supply design and the control of inter-layer crosstalk easier, but allowing arbitrary routes can reduce the need for vias and decrease the number of required wiring layers.

See also

• Electronic design automation
• Design flow (EDA)
• Integrated circuit design
• Place and route
• Auto polarity (differential pairs)
• Auto crossover (Ethernet)

References