T-RAM

This technology exploits the electrical property known as negative differential resistor and is characterized by the way in which its memory cells are built, combining DRAM efficiency in terms of space with that of SRAM in terms of speed. Very similar to the current 6T-SRAM, or SRAM memories with 6 cell transistors, is substantially different because the SRAM latch CMOS, consisting of 4 of the 6 transistors of each cell, is replaced by a bipolar latch PNP -NPN of a single Thyristor. The result is to significantly reduce the area occupied by each cell, thus obtaining a highly scalable memory that has already reached storage density several times higher than the current SRAM.

The Thyristor-RAM provides the best density / performance ratio available between the various integrated memories, matching the performance of an SRAM memory, but allowing 2-3 times greater storage density and lower power consumption. It is expected that the new generation of T-RAM memory will have the same storage density as DRAMs.

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