Template talk:AMD Radeon RX 7000

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In AMD's announcement on 2022/11/03, a presenter mentioned that each shader unit can execute 2 instructions per clock in RDNA 3. A note should be added about this to the template once sufficient documentation is available at AMD.com so that stream processors/shader units can be compared like-for-like against RDNA-2. 97.113.66.21 (talk) 03:02, 4 November 2022 (UTC)[reply]

I agree, some note about it would be nice, maybe inside main article (also inside uarch).

Unfortunutely due to this change, you won't be able to do "apples to apples" comparison between RDNA3 and RDNA2(or 1).

Shaders count didn't magically double up (by switching to dual compute units), 5376 and 6144 is tehnically correct (same on AMD site).Also SIMDs won't always issue two instrucitons. Rando717 (talk) 05:14, 4 November 2022 (UTC)[reply]

is the processing power the gflops of the boost or the base clock? and could we calculate the other by dividing the gflops by one clock and multiplying by the other clock? Superchad (talk) 04:16, 4 November 2022 (UTC)[reply]

Usually is the boost clock (if available), you could reverse calculate it, but the result won't be as "accurate" without decimals. :-)

If I am not mistaken calculating teoretical FLOPS in this case (RDNA3), goes something like this:

single float(fp32) = TMUs * ROPs * core clock(in GHz) / 3, don't divide by 1000(TFLOPS) right away, use result to calculate fp16/64.

half(16) = single * 2 , double(64) = single / 16

Round up decimals, if number 5 or more (43.169 to 43.17 or 43.2 or 43) Rando717 (talk) 05:40, 4 November 2022 (UTC)[reply]

If RDNA3 have two AI accelerators per compute unit (CU).Shouldn't we add AI accelerators inside core's config (168 and 192)? Rando717 (talk) 05:46, 4 November 2022 (UTC)[reply]

Now already implemented by Rando717 with this edit on 13:25, 22 March 2023 UTC. AP 499D25 (talk) 03:46, 5 April 2023 (UTC)[reply]

I am against the separation of release date and price columns, as it makes the table wider for what is just a minor improvement in readability in my opinion. The default skin on English Wikipedia is now Vector 2022, as we know it, and it has a new "limited width" feature that reduces the width of the article view, which is enabled by default. So as you would imagine, excessively large tables would not play well with it. Not to mention laptop users, tablet users, mobile phone users, literally anyone with a small display will have a harder time reading a table that has unnecessary extra columns.

The separation of transistor count and die size also makes me sigh, but it's also something I can kind of agree on, as indeed, the 7900 XT has one less MCD die than the XTX so technically it has less transistors. There's no better way to state that clearly than adding another column, as splitting up a combined transistor + die size cell into two ends up with a mess that bloats up the table height, with bulky repetition of this many transistors in a GCD, [next line] this many transistors in an MCD.

What is also worth noting however, is cut down models of monolithic GPU dies (e.g. RX 5700 of Navi 10) also have less working transistors in them than the full die variant(s), yet the cut down models are still stated to have the same transistor counts as the full models. So I'm not honestly 100% sure about stating the true transistor count of cut-down MCM Navi chips, as then you might as well go and say RX 5700 has less than 10 billion transistors, as some parts of the die are disabled / cut off / not working. Furthermore, AMD themselves claim 58.0 billion transistors for the RX 7900 XT: source.

@JmsDoug is invited to the discussion here, and @Rando717 if you could comment on the third paragraph that would be great also.

AP 499D25 (talk) 03:39, 5 April 2023 (UTC)[reply]

1) About transistors: On RX 7900 XT product page AMD claims transistor count is the same as 7900 XTX (58B). Same with RX 5700, 10.3B. So, we should do the same? (like we used to).

2) About die sizes: True, 7900 XT has one less "active" MCD. However there are still all 6 dies present, except 6th one is a "dummy" for heat dissipation. Therefor approx die size of 7900 XT and XTX model is about the same.

After announcement event AMD posted press release stating die size of GCD & MCD (306mm2 & 37.5mm2), which is higher than previous 300mm2 & 37mm2 from event.

There are early reviews / news with announcement numbers, but if we do rough math using press release numbers:

306 + (6x 37,5)= 531mm2. Even if GCD was rounded (like in event), lets say it's 305.5mm2, that would be 530.5 (still ~531).

So I would suggest merging back transistors & die size and use only 58B and ~531mm2 inside cell. We should remove MCD/GCD from table and add extra footnote about chiplet die sizes with press release ref. That way we can save good portion of table width. Also maybe add note about one less active MCD... or inside header under Chiplets add (active) or something.

That's my opinion on this subject, unless there is a better source with more accurate data. Rando717 (talk) 05:11, 5 April 2023 (UTC)[reply]

1. Yeah, that's what I was thinking. I agree on that one.

2. Actually, there is a dummy MCD on the 7900 XT indeed, for an even securement of the GPU cooler with balanced mounting pressure I'm guessing.

Ah, so the chiplet die size numbers from the AMD presentation are rounded? I've always wondered what the discrepancy between the AMD presentation's numbers and secondary sources' numbers were, and which of the two were actually correct / most accurate.

And yeah I also agree with merging the transistors and die size data again. The total die size / area should have a "(total)" written next to it for clarification, followed by the footnote of course.

Between putting "(active)" in Chiplets header cell and adding a footnote about dummy/inactive dies, I'd choose the latter one, looks minimal yet makes the messaging clear (there's never going to be an inactive GCD on Navi 3x series, as there will be only one on probably all configurations). Practically, we discount dummy dies, IIRC the Threadripper 1000 series has two compute dies on all models but it also has two dummy dies for even heatspreader securement, in reality we just refer to it as having two compute dies the majority of the time. AP 499D25 (talk) 09:36, 5 April 2023 (UTC)[reply]

AMD claim 58 billion transistors for the 7900 XT becuase it ships with 6 MCDs like the XTX with one disabled. They have a dummy MCD on the 7900 XT for equal mounting pressure but only 5 are active. It would make more sense to use the transistor count for the dies that are actually active. It looks odd that the table explicitly says the 7900 XT has one less MCD but still has the same transistor count as the 7900 XTX with one more MCD. JmsDoug (talk) 12:28, 5 April 2023 (UTC)[reply]

Okay, that makes a lot of sense, I got it.

How about, like what Rando717 has come up with above, add an "(active)" in the Chiplets column header cell or add an explanatory footnote about dummy dies to clarify the presence of inactive dies? That way we wouldn't have to split off transistor count from the die size and specify a different count for the 7900 XT because of one less MCD.

Let me know what works out.

AP 499D25 (talk) 11:28, 7 April 2023 (UTC)[reply]

I merged transistors and die size columns. I also added footnote with ref about die size. Rando717 (talk) 17:10, 21 April 2023 (UTC)[reply]