DF-224
The DF-224 is a space-qualified
graceful failure modes.[1] There were three I/O processors, one operational and two backups. The power supply consisted of 6 independent power converters, with overlapping coverage of the operating functions.[2] The processor used fixed-point arithmetic with a two's complement
format.
Compared to computers that came later, the DF-224 was big and slow. It was roughly 45 centimeters (18 in) by 45 centimeters (18 in) by 30 centimeters (12 in), weighed 50 kilograms (110 lb), and had a clock speed of 1.25 MHz.[3]
The DF-224 on HST was augmented with a 386 co-processor on the first servicing mission (SM1).[4]: 1–7 This had a clock speed of 16 MHz.[4]: fig 7-3
In Hubble servicing mission 3A the DF-224 (with co-processor) was replaced by the Advanced Computer using a 25 MHz
Intel i486, and much more storage[4]
: 1–7
The DF-224 was one of the candidate computers for the Space Shuttle, but was not selected.[5] It was also baselined in a version of a reusable Agena upper stage for use with the Shuttle,[6] but this was never built.
See also
- IBM RAD6000 - a more modern space-qualified computer.
- RAD750 - newer version
- Mongoose-V - radiation hard processor based on the MIPS-3000.
- Various implementations of the MIL-STD-1750A 16-bit processor have been used in several spacecraft
References
- ^ "DF-224/Coprocessor". STSci. 1999.
- ^ "Co-Processor" (PDF). NASA. 1993. Archived from the original (PDF) on 12 December 2021. Retrieved 2010-09-21.
- ISBN 978-1-85233-164-1.
- ^ a b c Lockheed Martin Missiles and Space. "Hubble Space Telescope Servicing Mission 3A Media Reference Guide" (PDF). NASA. Archived from the original (PDF) on 16 July 2021. Retrieved 2010-09-21.
- ^ Marshall William McMurran. ACHIEVING ACCURACY: A Legacy of Computers and Missiles. page 167.
- ^ "Reusable Agena study". NASA. 1974.