Lexra

Lexra

Industry	SIP cores
Founded	1997; 27 years ago (1997) in Waltham, Massachusetts, United States
Defunct	2003 (2003)

Lexra (1997–2003) was a semiconductor intellectual property core company based in Waltham, Massachusetts. Lexra developed and licensed semiconductor intellectual property cores that implemented the MIPS I architecture, except for the four unaligned load and store (lwl, lwr, swl, swr) instructions.^[1]

Lexra did not implement those instructions because they are not necessary for good performance in modern software.

processor. Lexra did not wish to pay a high license fee for permission to use the patent.

Lexra licensed soft cores, unlike

at the time. Lexra was probably the first semiconductor intellectual property core company to do so.

In 1998 Silicon Graphics spun out

infringement by Lexra's claims of compatibility with MIPS I. Lexra and MIPS Technologies settled the dispute by agreeing that Lexra would explicitly describe its products as not implementing unaligned loads and stores.

In 1999,

IBM mainframes

long before the application for MIPS Technologies' patent. Lexra contended that the patent was invalid if construed to cover software emulation of unaligned loads and stores. If construed to cover only hardware implementations, Lexra did not infringe. The protracted second lawsuit, combined with a downturn in semiconductor industry business, forced Lexra into a settlement with MIPS Technologies. The settlement included MIPS Technologies paying Lexra a large sum of money and granting Lexra a license to its technologies in exchange for Lexra exiting the IP business.

Lexra failed as a networking/communications fabless semiconductor chip company and ceased operations in January 2003.

In its 5.5 years, Lexra implemented ten processor designs and licensed nine of them as

. Lexra had the first

• Synthesizable (RTL to gates) MIPS processor core allowing customer-owned tools and customer-chosen foundry
• IP core to support EJTAG on-chip debug
• IP core to support MIPS16 code compression
• RISC processor IP core with a 6-stage pipeline; and later the first with a 7-stage pipeline
• dual-issue
  superscalar
  processor IP core
• coarse-grained multithreaded processor IP core and, later, the first fine-grained multithreaded processor IP core

Lexra also enhanced the MIPS I architecture with extensions that greatly improved performance for digital signal processing (DSP) algorithms.

References

External links

• Official website at the Wayback Machine (archived November 25, 2002)
• The Lexra Story by former employee Jonah Probell