Field-programmable gate array
A field-programmable gate array (FPGA) is a type of configurable
A FPGA configuration is generally written using a hardware description language (HDL) e.g. VHDL, similar to the ones used for application-specific integrated circuits (ASICs). Circuit diagrams were formerly used to write the configuration.
The logic blocks of an FPGA can be configured to perform complex combinational functions, or act as simple logic gates like AND and XOR. In most FPGAs, logic blocks also include memory elements, which may be simple flip-flops or more sophisticated blocks of memory.[1] Many FPGAs can be reprogrammed to implement different logic functions, allowing flexible reconfigurable computing as performed in computer software.
FPGAs also have a role in embedded system development due to their capability to start system software development simultaneously with hardware, enable system performance simulations at a very early phase of the development, and allow various system trials and design iterations before finalizing the system architecture.[2]
FPGAs are also commonly used during the development of ASICs to speed up the simulation process.
History
The FPGA industry sprouted from
Altera was founded in 1983 and delivered the industry's first reprogrammable logic device in 1984 – the EP300 – which featured a quartz window in the package that allowed users to shine an ultra-violet lamp on the die to erase the EPROM cells that held the device configuration.[4]
Xilinx produced the first commercially viable field-programmable gate array in 1985[3] – the XC2064.[5] The XC2064 had programmable gates and programmable interconnects between gates, the beginnings of a new technology and market.[6] The XC2064 had 64 configurable logic blocks (CLBs), with two three-input lookup tables (LUTs).[7]
In 1987, the Naval Surface Warfare Center funded an experiment proposed by Steve Casselman to develop a computer that would implement 600,000 reprogrammable gates. Casselman was successful and a patent related to the system was issued in 1992.[3]
Altera and Xilinx continued unchallenged and quickly grew from 1985 to the mid-1990s when competitors sprouted up, eroding a significant portion of their market share. By 1993, Actel (later Microsemi, now Microchip) was serving about 18 percent of the market.[6]
The 1990s were a period of rapid growth for FPGAs, both in circuit sophistication and the volume of production. In the early 1990s, FPGAs were primarily used in
By 2013, Altera (31 percent), Actel (10 percent) and Xilinx (36 percent) together represented approximately 77 percent of the FPGA market.[9]
Companies like Microsoft have started to use FPGAs to accelerate high-performance, computationally intensive systems (like the data centers that operate their Bing search engine), due to the performance per watt advantage FPGAs deliver.[10] Microsoft began using FPGAs to accelerate Bing in 2014, and in 2018 began deploying FPGAs across other data center workloads for their Azure cloud computing platform.[11]
Growth
The following timelines indicate progress in different aspects of FPGA design.
Gates
- 1987: 9,000 gates, Xilinx[6]
- 1992: 600,000, Naval Surface Warfare Department[3]
- Early 2000s: millions[8]
- 2013: 50 million, Xilinx[12]
Market size
- 1985: First commercial FPGA : Xilinx XC2064[5][6]
- 1987: $14 million[6]
- c. 1993: >$385 million[6][failed verification]
- 2005: $1.9 billion[13]
- 2010 estimates: $2.75 billion[13]
- 2013: $5.4 billion[14]
- 2020 estimate: $9.8 billion[14]
- 2030 estimate: $23.34 billion[15]
Design starts
A design start is a new custom design for implementation on an FPGA.
Design
Contemporary FPGAs have ample
As FPGA designs employ very fast I/O rates and bidirectional data buses, it becomes a challenge to verify correct timing of valid data within setup time and hold time.[19] Floor planning helps resource allocation within FPGAs to meet these timing constraints.
Some FPGAs have analog features in addition to digital functions. The most common analog feature is a programmable
Logic blocks
The most common FPGA architecture consists of an array of
"An application circuit must be mapped into an FPGA with adequate resources. While the number of logic blocks and I/Os required is easily determined from the design, the number of routing channels needed may vary considerably even among designs with the same amount of logic. For example, a crossbar switch requires much more routing than a systolic array with the same gate count. Since unused routing channels increase the cost (and decrease the performance) of the FPGA without providing any benefit, FPGA manufacturers try to provide just enough channels so that most designs that will fit in terms of lookup tables (LUTs) and I/Os can be routed. This is determined by estimates such as those derived from Rent's rule or by experiments with existing designs."[23]
In general, a logic block consists of a few logical cells. A typical cell consists of a 4-input LUT, a
Hard blocks
Modern FPGA families expand upon the above capabilities to include higher-level functionality fixed in silicon. Having these common functions embedded in the circuit reduces the area required and gives those functions increased performance compared to building them from logical primitives. Examples of these include multipliers, generic DSP blocks, embedded processors, high-speed I/O logic and embedded memories.
Higher-end FPGAs can contain high-speed
Soft core
An alternate approach to using hard macro processors is to make use of soft processor IP cores that are implemented within the FPGA logic. Nios II, MicroBlaze and Mico32 are examples of popular softcore processors. Many modern FPGAs are programmed at run time, which has led to the idea of reconfigurable computing or reconfigurable systems – CPUs that reconfigure themselves to suit the task at hand. Additionally, new non-FPGA architectures are beginning to emerge. Software-configurable microprocessors such as the Stretch S5000 adopt a hybrid approach by providing an array of processor cores and FPGA-like programmable cores on the same chip.
Integration
In 2012 the coarse-grained architectural approach was taken a step further by combining the
Clocking
Most of the logic inside of an FPGA is
3D architectures
To shrink the size and power consumption of FPGAs, vendors such as
Xilinx's approach stacks several (three or four) active FPGA dies side by side on a silicon interposer – a single piece of silicon that carries passive interconnect.[30][31] The multi-die construction also allows different parts of the FPGA to be created with different process technologies, as the process requirements are different between the FPGA fabric itself and the very high speed 28 Gbit/s serial transceivers. An FPGA built in this way is called a heterogeneous FPGA.[32]
Altera's heterogeneous approach involves using a single monolithic FPGA die and connecting other dies and technologies to the FPGA using Intel's embedded multi_die interconnect bridge (EMIB) technology.[33]
Programming
To define the behavior of the FPGA, the user provides a design in a hardware description language (HDL) or as a schematic design. The HDL form is more suited to work with large structures because it's possible to specify high-level functional behavior rather than drawing every piece by hand. However, schematic entry can allow for easier visualization of a design and its component modules.
Using an electronic design automation tool, a technology-mapped netlist is generated. The netlist can then be fit to the actual FPGA architecture using a process called place and route, usually performed by the FPGA company's proprietary place-and-route software. The user will validate the results using timing analysis, simulation, and other verification and validation techniques. Once the design and validation process is complete, the binary file generated, typically using the FPGA vendor's proprietary software, is used to (re-)configure the FPGA. This file is transferred to the FPGA via a serial interface (JTAG) or to an external memory device such as an EEPROM.
The most common HDLs are VHDL and Verilog. National Instruments' LabVIEW graphical programming language (sometimes referred to as G) has an FPGA add-in module available to target and program FPGA hardware. Verilog was created to simplify the process making HDL more robust and flexible. Verilog has a C-like syntax, unlike VHDL.[34][self-published source?]
To simplify the design of complex systems in FPGAs, there exist libraries of predefined complex functions and circuits that have been tested and optimized to speed up the design process. These predefined circuits are commonly called
In a typical
More recently,
.Most FPGAs rely on an SRAM-based approach to be programmed. These FPGAs are in-system programmable and re-programmable, but require external boot devices. For example, flash memory or EEPROM devices may load contents into internal SRAM that controls routing and logic. The SRAM approach is based on CMOS.
Rarer alternatives to the SRAM approach include:
- Fuse: one-time programmable. Bipolar. Obsolete.
- Antifuse: one-time programmable. CMOS. Examples: Actel SX and Axcelerator families; Quicklogic Eclipse II family.[36]
- PROM: programmable read-only memory technology. One-time programmable because of plastic packaging. Obsolete.
- EPROM: erasable programmable read-only memory technology. One-time programmable but with window, can be erased with ultraviolet (UV) light. CMOS. Obsolete.
- EEPROM: electrically erasable programmable read-only memory technology. Can be erased, even in plastic packages. Some but not all EEPROM devices can be in-system programmed. CMOS.
- Flash: flash-erase EPROM technology. Can be erased, even in plastic packages. Some but not all flash devices can be in-system programmed. Usually, a flash cell is smaller than an equivalent EEPROM cell and is, therefore, less expensive to manufacture. CMOS. Example: Actel ProASIC family.[36]
Manufacturers
In 2016, long-time industry rivals
At that time, they controlled nearly 90 percent of the market.Both Xilinx (now AMD) and Altera (now Intel) provide
In March 2010,
On June 1, 2015, Intel announced it would acquire Altera for approximately $16.7 billion and completed the acquisition on December 30, 2015.[42]
On October 27, 2020, AMD announced it would acquire Xilinx[43] and completed the acquisition valued at about $50 billion in February 2022.[44]
Other manufacturers include:
- Achronix, manufacturing SRAM based FPGAs with 1.5 GHz fabric speed[45]
- Altium, provides system-on-FPGA hardware-software design environment.[46]
- Cologne Chip, German Government backed designer and producer of FPGAs[47]
- Efinix offers small to medium-sized FPGAs. They combine logic and routing interconnects into a configurable XLR cell.
- GOWIN Semiconductors, manufacturing small and medium-sized SRAM and Flash-based FPGAs. They also offer pin-compatible replacements for a few Xilinx, Altera and Lattice products.
- Lattice Semiconductor, which manufactures low-power SRAM-based FPGAs featuring integrated configuration flash, instant-on and live reconfiguration
- SiliconBlue Technologies, which provides extremely low-power SRAM-based FPGAs with optional integrated nonvolatileconfiguration memory; acquired by Lattice in 2011
- Microchip:
- Microsemi (previously Actel), producing antifuse, flash-based, mixed-signal FPGAs; acquired by Microchip in 2018
- Atmel, a second source of some Altera-compatible devices; also FPSLIC[clarification needed] mentioned above;[48] acquired by Microchip in 2016
- QuickLogic,[49] which manufactures Ultra Low Power Sensor Hubs, extremely low powered, low-density SRAM-based FPGAs, with display bridges MIPI & RGB inputs, MIPI, RGB and LVDS outputs
Applications
An FPGA can be used to solve any problem which is computable. This is trivially proven by the fact that FPGAs can be used to implement a soft microprocessor, such as the Xilinx MicroBlaze or Altera Nios II. Their advantage lies in that they are significantly faster for some applications because of their parallel nature and optimality in terms of the number of gates used for certain processes.[50]
FPGAs originally began as competitors to CPLDs to implement glue logic for printed circuit boards. As their size, capabilities, and speed increased, FPGAs took over additional functions to the point where some are now marketed as full systems on chips (SoCs). Particularly with the introduction of dedicated multipliers into FPGA architectures in the late 1990s, applications which had traditionally been the sole reserve of digital signal processor hardware (DSPs) began to incorporate FPGAs instead.[51][52]
The evolution of FPGAs has motivated an increase in the use of these devices, whose architecture allows the development of hardware solutions optimized for complex tasks, such as 3D MRI image segmentation, 3D discrete wavelet transform, tomographic image reconstruction, or PET/MRI systems.[53][54] The developed solutions can perform intensive computation tasks with parallel processing, are dynamically reprogrammable, and have a low cost, all while meeting the hard real-time requirements associated with medical imaging.
Another trend in the use of FPGAs is
Traditionally,[
Where personal computer peripherals exist in niche markets or are struggling to make inroads into a mass market (sometimes despite heavy promotion), it can be more cost-effective to utilise FPGAs for small production runs (e.g. 1,000 units). Examples include exotic products such as e.g.
Other uses for FPGAs include:
- Space (with radiation hardening[57])
- Hardware security modules[58]
- High-speed financial transactions[59][60]
- Retrocomputing (e.g. the MARS and MiSTer FPGA projects)[citation needed]
Usage by United States Military
FPGAs play a crucial role in modern military communications, especially in systems like the Joint Tactical Radio System (JTRS) and in devices from companies such as Thales and Harris Corporation. Their flexibility and programmability make them ideal for military communications, offering customizable and secure signal processing. In the JTRS, used by the US military, FPGAs provide adaptability and real-time processing, crucial for meeting various communication standards and encryption methods. Thales leverages FPGA technology in designing communication devices that fulfill the rigorous demands of military use, including rapid reconfiguration and robust security. Similarly, Harris Corporation, now part of L3Harris Technologies, incorporates FPGAs in its defense and commercial communication solutions, enhancing signal processing and system security.[61]
L3Harris
- Rapidly Adaptable Standards-compliant Radio (RASOR): A Modular Open System Approach (MOSA) solution supporting over 50 data links and waveforms.
- ASPEN Technology Platform: Consists of proven hardware modules with programmable software and FPGA options for advanced, configurable data links.
- AN/PRC-117F(C) Radios: Supported the U.S. Air Force Electronic Systems Command, strengthening Harris' role as a full-spectrum communications system supplier.
Thales
- SYNAPS Radio Family: Utilizes Software Defined Radio (SDR) technology, typically involving FPGA for enhanced flexibility and performance.
- AN/PRC-148 (Multiband Inter/Intra Team Radio - MBITR): A small-form-factor, multiband, multi-mode SDR used in Afghanistan and Iraq.
- JTRS Cluster 2 Handheld Radio: Currently in development, recently completed a successful early operational assessment.
Security
FPGAs have both advantages and disadvantages as compared to ASICs or secure microprocessors, concerning hardware security. FPGAs' flexibility makes malicious modifications during fabrication a lower risk.[62] Previously, for many FPGAs, the design bitstream was exposed while the FPGA loads it from external memory (typically on every power-on). All major FPGA vendors now offer a spectrum of security solutions to designers such as bitstream encryption and authentication. For example, Altera and Xilinx offer AES encryption (up to 256-bit) for bitstreams stored in an external flash memory. Physical unclonable functions (PUFs) are integrated circuits that have their own unique signatures, due to processing, and can also be used to secure FPGAs while taking up very little hardware space.[63]
FPGAs that store their configuration internally in nonvolatile flash memory, such as
With its Stratix 10 FPGAs and SoCs, Altera introduced a Secure Device Manager and physical unclonable functions to provide high levels of protection against physical attacks.[64]
In 2012 researchers Sergei Skorobogatov and Christopher Woods demonstrated that some FPGAs can be vulnerable to hostile intent. They discovered a critical backdoor vulnerability had been manufactured in silicon as part of the Actel/Microsemi ProAsic 3 making it vulnerable on many levels such as reprogramming crypto and access keys, accessing unencrypted bitstream, modifying low-level silicon features, and extracting configuration data.[65]
In 2020 a critical vulnerability (named "Starbleed") was discovered in all Xilinx 7series FPGAs that rendered bitstream encryption useless. There is no workaround. Xilinx did not produce a hardware revision. Ultrascale and later devices, already on the market at the time, were not affected.
Similar technologies
Historically, FPGAs have been slower, less energy efficient and generally achieved less functionality than their fixed ASIC counterparts. A study from 2006 showed that designs implemented on FPGAs need on average 40 times as much area, draw 12 times as much dynamic power, and run at one third the speed of corresponding ASIC implementations.[66]
Advantages of FPGAs include the ability to re-program when already deployed (i.e. "in the field") to fix
The primary differences between
See also
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Further reading
- Sadrozinski, Hartmut F.-W.; Wu, Jinyuan (2010). Applications of Field-Programmable Gate Arrays in Scientific Research. Taylor & Francis. ISBN 978-1-4398-4133-4.
- Wirth, Niklaus (1995). Digital Circuit Design An Introduction Textbook. Springer. ISBN 978-3-540-58577-0.
- Mitra, Jubin (2018). "An FPGA-Based Phase Measurement System". IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26. IEEE: 133–142. S2CID 4920719.
- Mencer, Oskar et al. (2020). "The history, status, and future of FPGAs". Communications of the ACM. ACM. Vol. 63, No. 10. doi:10.1145/3410669
External links
- What is an FPGA? on YouTube
- Migrating from MCU to FPGA