Floating-point unit

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Collection of the x87 family of math coprocessors by Intel

A floating-point unit (FPU, colloquially a math coprocessor) is a part of a

trigonometric calculations, but the accuracy can be low,[2][3]
so some systems prefer to compute these functions in software.

In general-purpose

embedded processors
do not have hardware support for floating-point operations (while they increasingly have them as standard).

When a CPU is executing a program that calls for a floating-point operation, there are three ways to carry it out:

  • A floating-point unit emulator (a floating-point library in software)
  • Add-on FPU hardware
  • Integrated FPU (in hardware)

History

In 1954, the IBM 704 had floating-point arithmetic as a standard feature, one of its major improvements over its predecessor the IBM 701. This was carried forward to its successors the 709, 7090, and 7094.

In 1963, Digital announced the PDP-6, which had floating point as a standard feature.[4]

In 1963, the GE-235 featured an "Auxiliary Arithmetic Unit" for floating point and double-precision calculations.[5]

Historically, some systems implemented

user-space code. When only integer functionality is available, the CORDIC methods are most commonly used for transcendental function evaluation.[citation needed
]

In most modern computer architectures, there is some division of floating-point operations from

clocking schemes.[6]

CORDIC routines have been implemented in

80486[7] microprocessor series, as well as in the Motorola 68881[7][8] and 68882 for some kinds of floating-point instructions, mainly as a way to reduce the gate
counts (and complexity) of the FPU subsystem.

Floating-point operations are often

superscalar architectures without general out-of-order execution
, floating-point operations were sometimes pipelined separately from integer operations.

The modular architecture of

Hyperthreading, where two virtual simultaneous threads share the resources of a single physical core.[13][14]

Floating-point library

Wikibooks has a book on the topic of: Floating Point/Soft Implementations
Wikibooks has a book on the topic of: Embedded Systems/Floating Point Unit

Some floating-point hardware only supports the simplest operations: addition, subtraction, and multiplication. But even the most complex floating-point hardware has a finite number of operations it can support – for example, no FPUs directly support arbitrary-precision arithmetic.

When a CPU is executing a program that calls for a floating-point operation that is not directly supported by the hardware, the CPU uses a series of simpler floating-point operations. In systems without any floating-point hardware, the CPU emulates it using a series of simpler fixed-point arithmetic operations that run on the integer arithmetic logic unit.

The software that lists the necessary series of operations to emulate floating-point operations is often packaged in a floating-point library.

Integrated FPUs

In some cases, FPUs may be specialized, and divided between simpler floating-point operations (mainly addition and multiplication) and more complicated operations, like division. In some cases, only the simple operations may be implemented in hardware or microcode, while the more complex operations are implemented as software.

In some current architectures, the FPU functionality is combined with SIMD units to perform SIMD computation; an example of this is the augmentation of the x87 instructions set with SSE instruction set in the x86-64 architecture used in newer Intel and AMD processors.

Add-on FPUs

Main article: Coprocessor

Several models of the PDP-11, such as the PDP-11/45,[15] PDP-11/34a,[16]: 184–185  PDP-11/44,[16]: 195, 211  and PDP-11/70,[16]: 277, 286–287  supported an add-on floating-point unit to support floating-point instructions. The PDP-11/60,[16]: 261  MicroPDP-11/23[17] and several VAX models[18][19] could execute floating-point instructions without an add-on FPU (the MicroPDP-11/23 required an add-on microcode option),[17] and offered add-on accelerators to further speed the execution of those instructions.

In the 1980s, it was common in

microcomputers for the FPU to be entirely separate from the CPU
, and typically sold as an optional add-on. It would only be purchased if needed to speed up or enable math-intensive programs.

The IBM PC,

ARM powered Archimedes
range.

Coprocessors were available for the

Macintosh and Commodore Amiga
series, but unlike IBM PC-compatible systems, sockets for adding the coprocessor were not as common in lower-end systems.

There are also add-on FPU coprocessor units for

instruction sets, etc.) and are often provided with their own integrated development environments
(IDEs).

See also

References

  1. ISSN 0018-8646
    .
  2. ^ Dawson, Bruce (2014-10-09). "Intel Underestimates Error Bounds by 1.3 quintillion". randomascii.wordpress.com. Retrieved 2020-01-16.
  3. ^ "FSIN Documentation Improvements in the "Intel® 64 and IA-32 Architectures Software Developer's Manual"". intel.com. 2014-10-09. Archived from the original on 2020-01-16. Retrieved 2020-01-16.
  4. ^ "PDP-6 Handbook" (PDF). www.bitsavers.org. Archived (PDF) from the original on 2022-10-09.
  5. ^ "GE-2xx documents". www.bitsavers.org. CPB-267_GE-235-SystemManual_1963.pdf, p. IV-4.
  6. ^ "Intel 80287 family". www.cpu-world.com. Retrieved 2019-01-15.
  7. ^
    LCCN 2005048094
    . Retrieved 2015-12-01.
  8. ^
    doi:10.1016/0165-6074(83)90151-5
    .
  9. ISBN 0471875694
    . 9780471875697. Retrieved 2016-01-02.
  10. ISSN 0360-5280
    .
  11. ^ a b c Jarvis, Pitts (1990-10-01). "Implementing CORDIC algorithms – A single compact routine for computing transcendental functions". Dr. Dobb's Journal: 152–156. Retrieved 2016-01-02.
  12. ^ a b Yuen, A. K. (1988). "Intel's Floating-Point Processors". Electro/88 Conference Record: 48/5/1–7.
  13. ^ "Archived copy". cdn3.wccftech.com. Archived from the original on 9 May 2015. Retrieved 14 March 2022.{{cite web}}: CS1 maint: archived copy as title (link)
  14. ^ "AMD unveils Flex FP". bit-tech.net. Retrieved 29 March 2018.
  15. ^ PDP-11/45 Processor Handbook (PDF). Digital Equipment Corporation. 1973. Chapter 7 "Floating Point Processor".
  16. ^ a b c d PDP-11 Processor Handbook (PDF). Digital Equipment Corporation. 1979.
  17. ^ a b MICRO/PDP-11 Handbook (PDF). Digital Equipment Corporation. 1983. p. 33.
  18. ^ VAX – Hardware Handbook Volume I – 1986 (PDF). Digital Equipment Corporation. 1985.
  19. ^ VAX – Hardware Handbook Volume II – 1986 (PDF). Digital Equipment Corporation. 1986.
  20. ^ "Western Electric 32206 co-processor". www.cpu-world.com. Retrieved 2021-11-06.

Further reading

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