Bumpless Build-up Layer
Bumpless Build-up Layer or BBUL is a
silicon die
. The usual way is to manufacture them separately and bond them together.
It was presented in October 2001. It should have been a key component in the 8 GHz and 15 GHz processors that should have been in the market by 2005 and 2007 respectively.[1] Also 20 GHz should have been possible before the year 2010.[citation needed] The BBUL is not needed yet[when?] because there is no longer the clock-frequency competition.
Advantages
- Thinner and lighter.
- Higher performance and lower power.
- Higher interconnect density. C4 bumps were reaching their limits.
- Better signal routing capability.
- Allows many chips in the same package.
External links
- BBUL Packaging
- Intel to delay Bumpless Build-up Layer processor package
- Bumpless Build-Up Layer Packaging
References