Circuit complexity
In
Proving lower bounds on size of Boolean circuits computing explicit Boolean functions is a popular approach to separating complexity classes. For example, a prominent circuit class P/poly consists of Boolean functions computable by circuits of polynomial size. Proving that would separate P and NP (see below).
.Size and depth
A Boolean circuit with input
There are two major notions of circuit complexity[1] The circuit-size complexity of a Boolean function is the minimal size of any circuit computing . The circuit-depth complexity of a Boolean function is the minimal depth of any circuit computing .
These notions generalize when one considers the circuit complexity of any language that contains strings with different bit lengths, especially infinite formal languages. Boolean circuits, however, only allow a fixed number of input bits. Thus, no single Boolean circuit is capable of deciding such a language. To account for this possibility, one considers families of circuits where each accepts inputs of size . Each circuit family will naturally generate the language by circuit outputting when a length string is a member of the family, and otherwise. We say that a family of circuits is size minimal if there is no other family that decides on inputs of any size, , with a circuit of smaller size than (respectively for depth minimal families). Thus, circuit complexity is meaningful even for non-recursive languages. The notion of a uniform family enables variants of circuit complexity to be related to algorithm based complexity measures of recursive languages. However, the non-uniform variant is helpful to find lower bounds on how complex any circuit family must be in order to decide given languages.
Hence, the circuit-size complexity of a formal language is defined as the function , that relates a bit length of an input, , to the circuit-size complexity of a minimal circuit that decides whether inputs of that length are in . The circuit-depth complexity is defined similarly.
Uniformity
Boolean circuits are one of the prime examples of so-called non-uniform models of computation in the sense that inputs of different lengths are processed by different circuits, in contrast with uniform models such as Turing machines where the same computational device is used for all possible input lengths. An individual computational problem is thus associated with a particular family of Boolean circuits where each is the circuit handling inputs of n bits. A uniformity condition is often imposed on these families, requiring the existence of some possibly resource-bounded Turing machine that, on input n, produces a description of the individual circuit . When this Turing machine has a running time polynomial in n, the circuit family is said to be P-uniform. The stricter requirement of DLOGTIME-uniformity is of particular interest in the study of shallow-depth circuit-classes such as AC0 or TC0. When no resource bounds are specified, a language is recursive (i.e., decidable by a Turing machine) if and only if the language is decided by a uniform family of Boolean circuits.
Polynomial-time uniform
A family of Boolean circuits is polynomial-time uniform if there exists a
- M runs in polynomial time
- For all , M outputs a description of on input
Logspace uniform
A family of Boolean circuits is logspace uniform if there exists a
- M runs in logarithmic work space (i.e. M is a log-space transducer)
- For all , M outputs a description of on input
History
Circuit complexity goes back to Shannon in 1949,[2] who proved that almost all Boolean functions on n variables require circuits of size Θ(2n/n). Despite this fact, complexity theorists have so far been unable to prove a superlinear lower bound for any explicit function.
Superpolynomial lower bounds have been proved under certain restrictions on the family of circuits used. The first function for which superpolynomial circuit lower bounds were shown was the parity function, which computes the sum of its input bits modulo 2. The fact that parity is not contained in AC0 was first established independently by Ajtai in 1983[3][4] and by Furst, Saxe and Sipser in 1984.[5] Later improvements by Håstad in 1987[6] established that any family of constant-depth circuits computing the parity function requires exponential size. Extending a result of Razborov,[7] Smolensky in 1987[8] proved that this is true even if the circuit is augmented with gates computing the sum of its input bits modulo some odd prime p.
The k-clique problem is to decide whether a given graph on n vertices has a clique of size k. For any particular choice of the constants n and k, the graph can be encoded in binary using bits, which indicate for each possible edge whether it is present. Then the k-clique problem is formalized as a function such that outputs 1 if and only if the graph encoded by the string contains a clique of size k. This family of functions is monotone and can be computed by a family of circuits, but it has been shown that it cannot be computed by a polynomial-size family of monotone circuits (that is, circuits with AND and OR gates but without negation). The original result of Razborov in 1985[7] was later improved to an exponential-size lower bound by Alon and Boppana in 1987.[9] In 2008, Rossman[10] showed that constant-depth circuits with AND, OR, and NOT gates require size to solve the k-clique problem even in the average case. Moreover, there is a circuit of size that computes .
In 1999, Raz and McKenzie later showed that the monotone NC hierarchy is infinite.[11]
The Integer Division Problem lies in uniform TC0.[12]
Circuit lower bounds
Circuit lower bounds are generally difficult. Known results include
- Parity is not in nonuniform AC0, proved by Ajtai in 1983[3][4] as well as by Furst, Saxe and Sipser in 1984.[5]
- Uniform TC0 is strictly contained in PP, proved by Allender.[13]
- The classes MA/1[14](MA with one bit of advice) are not in SIZE(nk) for any constant k.
- While it is suspected that the nonuniform class ACC0 does not contain the majority function, it was only in 2010 that Williams proved that .[15]
It is open whether NEXPTIME has nonuniform TC0 circuits.
Proofs of circuit lower bounds are strongly connected to
In 1997, Razborov and Rudich showed that many known circuit lower bounds for explicit Boolean functions imply the existence of so called natural properties useful against the respective circuit class.[17] On the other hand, natural properties useful against P/poly would break strong pseudorandom generators. This is often interpreted as a "natural proofs" barrier for proving strong circuit lower bounds. In 2016, Carmosino, Impagliazzo, Kabanets and Kolokolova proved that natural properties can be also used to construct efficient learning algorithms.[18]
Complexity classes
Many circuit complexity classes are defined in terms of class hierarchies. For each non-negative integer i, there is a class NCi, consisting of polynomial-size circuits of depth , using bounded fan-in AND, OR, and NOT gates. The union NC of all of these classes is a subject to discussion. By considering unbounded fan-in gates, the classes ACi and AC (which is equal to NC) can be constructed. Many other circuit complexity classes with the same size and depth restrictions can be constructed by allowing different sets of gates.
Relation to time complexity
If a certain language, , belongs to the time-complexity class for some function , then has circuit complexity . If the Turing Machine that accepts the language is oblivious (meaning that it reads and writes the same memory cells regardless of input), then has circuit complexity .[19]
Monotone circuits
A monotone Boolean circuit is one that has only AND and OR gates, but no NOT gates. A monotone circuit can only compute a monotone Boolean function, which is a function where for every , , where means that for all .
See also
- Circuit minimization
Notes
- proof.
References
- ^ Sipser, Michael (1997). Introduction to the theory of computation (1 ed.). Boston, USA: PWS Publishing Company. p. 324.
- .
- ^ a b Ajtai, Miklós (1983). "-formulae on finite structures". Annals of Pure and Applied Logic. 24: 1–24. .
- ^ a b Ajtai, Miklós; Komlós, János; Szemerédi, Endre (1983). "An sorting network". Proceedings of the 15th Annual ACM Symposium on Theory of Computing, 25–27 April, 1983, Boston, Massachusetts, USA. Association for Computing Machinery. pp. 1–9. .
- ^ S2CID 6306235.
- Håstad, Johan Torkel (1987). Computational limitations of small depth circuits(PDF) (Ph.D. thesis). Massachusetts Institute of Technology.
- ^ ISSN 0197-6788.
- .
- S2CID 17397273.
- .
- .
- Springer Verlag. pp. 104–114.
- .
- .
- .
- S2CID 12451799.
- Razborov, Aleksandr Aleksandrovich; Rudich, Steven (1997). "Natural proofs". Journal of Computer and System Sciences. Vol. 55. pp. 24–35.
- Impagliazzo, Russell Graham; Kabanets, Valentine; Kolokolova, Antonina (2016). "Learning algorithms from natural proofs". Computational Complexity Conference.
- S2CID 2432526.
Further reading
- ISBN 978-3-540-64310-4.
- LCCN 87-10388. (xii+457 pages) (NB. At the time an influential textbook on the subject, commonly known as the "Blue Book". Also available for download (PDF) at the Electronic Colloquium on Computational Complexity.)
- Zwick, Uri. "Lecture notes for a course of Uri Zwick on circuit complexity".