Don't-care term

Source: Wikipedia, the free encyclopedia.
Not to be confused with Three-state logic.

In

minimization
).

Don't-care terms are important to consider in minimizing logic circuit design, including graphical methods like

Karnaugh–Veitch maps and algebraic methods such as the Quine–McCluskey algorithm. In 1958, Seymour Ginsburg proved that minimization of states of a finite-state machine with don't-care conditions does not necessarily yield a minimization of logic elements. Direct minimization of logic elements in such circuits was computationally impractical (for large systems) with the computing power available to Ginsburg in 1958.[14]

Examples

Don't-care terms to get minimal circuit
ba
dc
 00 01 11 10
00 1 0 0 1
01 0 0 0 1
11 0 0 0 1
10 1 0 0 1
Karnaugh map for lower left segment
ba
dc
 00 01 11 10
00 1 0 0 1
01 0 0 0 1
11 x x x x
10 1 0 x x
Digits in 7-segment display
ba
dc
 00 01 11 10
00
01
11
10

Examples of don't-care terms are the binary values 1010 through 1111 (10 through 15 in decimal) for a function that takes a

7-segment display
can be minimized to a b + a c by an appropriate choice of circuit outputs for dcba = 1010…1111.

Write-only registers, as frequently found in older hardware, are often a consequence of don't-care optimizations in the trade-off between functionality and the number of necessary logic gates.[15]

Don't-care states can also occur in

encoding schemes and communication protocols.[nb 1]

X value

"Don't care" may also refer to an unknown value in a

multi-valued logic system, in which case it may also be called an X value or don't know.[16] In the Verilog hardware description language such values are denoted by the letter "X". In the VHDL hardware description language such values are denoted (in the standard logic package) by the letter "X" (forced unknown) or the letter "W" (weak unknown).[17]

An X value does not exist in hardware. In simulation, an X value can result from two or more sources driving a signal simultaneously, or the stable output of a flip-flop not having been reached. In synthesized hardware, however, the actual value of such a signal will be either 0 or 1, but will not be determinable from the circuit's inputs.[17]

Power-up states

Further considerations are needed for logic circuits that involve some

error detection, or they are transitory and lead to a normal operational state.[19][20][21]

See also

Notes

  1. Hertz encoding, Chen–Ho encoding and Densely packed decimal
    (DPD).

References

  1. S2CID 51636736. Paper 53-217. Archived from the original
    (PDF) on 2017-04-16. Retrieved 2017-04-16. (7 pages)
  2. ^
    ISBN 978-0-47168805-1
    . p. 97: […] These prohibited combinations will here be called redundancies (they have also been called irrelevancies, "don't cares," and forbidden combinations), and they can usually be used to simplify Boolean functions. […] (xvi+408 pages)
  3. LCCN 58-7896
    . (xviii+686 pages)
  4. ^
    S2CID 57495605. p. 433: […] what Caldwell
    calls "optional entries" […] other authors have called "invalid combinations", "don't cares", "vacuous combinations" […] (2 pages)
  5. D. Van Nostrand Company, Inc. p. 147. Archived from the original on 2020-05-09. Retrieved 2020-05-09. [1]
    (2+xx+556+2 pages)
  6. ^ Aiken, Howard H.; Blaauw, Gerrit; Burkhart, William; Burns, Robert J.; Cali, Lloyd; Canepa, Michele; Ciampa, Carmela M.; Coolidge, Jr., Charles A.; Fucarile, Joseph R.; Gadd, Jr., J. Orten; Gucker, Frank F.; Harr, John A.; Hawkins, Robert L.; Hayes, Miles V.; Hofheimer, Richard; Hulme, William F.; Jennings, Betty L.; Johnson, Stanley A.; Kalin, Theodore; Kincaid, Marshall; Lucchini, E. Edward; Minty, William; Moore, Benjamin L.; Remmes, Joseph; Rinn, Robert J.; Roche, John W.; Sanbord, Jacquelin; Semon, Warren L.; Singer, Theodore; Smith, Dexter; Smith, Leonard; Strong, Peter F.; Thomas, Helene V.; Wang, An; Whitehouse, Martha L.; Wilkins, Holly B.; Wilkins, Robert E.; Woo, Way Dong; Little, Elbert P.; McDowell, M. Scudder (1952) [January 1951]. Synthesis of electronic computing and control circuits. The Annals of the Computation Laboratory of Harvard University. Vol. XXVII (second printing, revised ed.). Write-Patterson Air Force Base: Harvard University Press (Cambridge, Massachusetts, USA) / Geoffrey Cumberlege Oxford University Press (London). ark:/13960/t4zh1t09d. Retrieved 2017-04-16. (2+x+278+2 pages) (NB. Work commenced in April 1948.)
  7. I.R.E.: 47–57. Archived from the original on 2020-07-03. Retrieved 2020-07-03. [2][3][4][5][6][7][8][9][10][11][12]
    (11 pages)
  8. ^ Rushdi, Ali Muhammad Ali; Badawi, Raid Mohammad Salih (January 2017). "Karnaugh-Map Utilization in Boolean Analysis: The Case of War Termination". Journal of Engineering and Computer Sciences. Qualitative Comparative Analysis. 10 (1). Department of Electrical and Computer Engineering, King Abdulaziz University, Jeddah, Saudi Arabi / Qassim University: 53–88 [54–55, 57, 61–63]. Rabi'II 1438H. Archived from the original on 2021-02-16. Retrieved 2021-02-17. [13]
  9. Iliffe Technical Publications Ltd.: 34–37. Archived (PDF) from the original on 2021-03-09. Retrieved 2020-05-09. [14]
  10. NCID BA12104142
    . Retrieved 2021-03-28. p. 31: […] sometimes known as a can't happen condition […] (x+189 pages)
  11. ^ Association Internationale pour le Calcul Analogique (AICA), ed. (1970) [1969-09-15]. "unknown". Colloque international / International Symposium. Systèmes logiques: Conception et applications / Design and Applications of Logical Systems. Actes / Proceedings. Bruxelles, 15–20 septembre 1969 / Brussels, September 15–20, 1969. (in English and French). Part 2. Bruxelles, Belgium: Presses Académiques Européennes: 1253. Retrieved 2021-03-28. {{cite journal}}: Cite uses generic title (help) (xxxiii+650+676 pages)
  12. ISBN 978-0-08047730-5. Retrieved 2020-04-19.{{cite book}}: CS1 maint: ignored ISBN errors (link) (519 pages) [15]
  13. LCCN 90-2689
    . Retrieved 2020-03-30. (220 pages)
  14. S2CID 10118067
    .
  15. Toshiba Corporation. 2008-08-29 [2007-10-11]. p. 61. Archived
    from the original on 2020-04-19. p. 61: […] WDTCR1 is a write-only register and must not be used with any of read-modify-write instructions. If WDTCR1 is read, a don't care is read. […] (9+vi+190 pages)
  16. ISBN 0-8053-2703-7
    . 32703-7. p. 64: […] The output functions have the value "X" for each of the input combinations we should never encounter. When used in a truth tables, the value X is often called a don't care. Do not confuse this with the value X reported by many logic simulators, where it represents an undefined value or a don't know. Any actual implementation of the circuit will generate some output for the don't care cases. […] (2+xxviii+699+10+2 pages)
  17. ^
    ISBN 0-412-61650-5
    . Retrieved 2020-03-30. (x+327 pages)
  18. ^
    ISBN 0-333-19266-4. Archived
    from the original on 2020-04-30. Retrieved 2020-04-30. (4+viii+146+6 pages)
  19. S2CID 42116934. Retrieved 2020-03-30. {{cite book}}: |journal= ignored (help
    ) (viii+312 pages)
  20. Intel Corporation. 2017. Archived
    from the original on 2020-04-19. Retrieved 2020-04-19.
  21. Intel Corporation. 2020. Archived
    from the original on 2020-04-19. Retrieved 2020-04-19.

Further reading
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