Load–store architecture
In
load and store between memory and registers) and ALU operations (which only occur between registers).[1]
: 9–12
Some
: 9–12For instance, in a load–store approach both operands and destination for an ADD operation must be in registers. This differs from a
CISC instruction set architecture such as x86) in which one of the operands for the ADD operation may be in memory, while the other is in a register.[1]
: 9–12
The earliest example of a load–store architecture was the
better source needed]) use the load–store approach.[3]
See also
References
- ^ a b c d
ISBN 0867202041.
- ^ "AMD GCN reference" (PDF).
- ^
ISBN 0867204745.
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