Offset binary
Offset binary,
The 5-bit
One historically prominent example of offset-64 (excess-64) notation was in the
The 8-bit exponent in Microsoft Binary Format, a floating point format used in various programming languages (in particular BASIC) in the 1970s and 1980s, was encoded using an offset-129 notation (excess-129).
The
Offset binary is often used in digital signal processing (DSP). Most analog to digital (A/D) and digital to analog (D/A) chips are unipolar, which means that they cannot handle bipolar signals (signals with both positive and negative values). A simple solution to this is to bias the analog signals with a DC offset equal to half of the A/D and D/A converter's range. The resulting digital data then ends up being in offset binary format.[5]
Most standard computer CPU chips cannot handle the offset binary format directly[citation needed]. CPU chips typically can only handle signed and unsigned integers, and floating point value formats. Offset binary values can be handled in several ways by these CPU chips. The data may just be treated as unsigned integers, requiring the programmer to deal with the zero offset in software. The data may also be converted to signed integer format (which the CPU can handle natively) by simply subtracting the zero offset. As a consequence of the most common offset for an n-bit word being 2n−1, which implies that the first bit is inverted relative to two's complement, there is no need for a separate subtraction step, but one simply can invert the first bit. This sometimes is a useful simplification in hardware, and can be convenient in software as well.
Table of offset binary for four bits, with two's complement for comparison:[6]
| Decimal | Offset binary, K = 8 |
Two's complement |
|---|---|---|
| 7 | 1111 | 0111 |
| 6 | 1110 | 0110 |
| 5 | 1101 | 0101 |
| 4 | 1100 | 0100 |
| 3 | 1011 | 0011 |
| 2 | 1010 | 0010 |
| 1 | 1001 | 0001 |
| 0 | 1000 | 0000 |
| −1 | 0111 | 1111 |
| −2 | 0110 | 1110 |
| −3 | 0101 | 1101 |
| −4 | 0100 | 1100 |
| −5 | 0011 | 1011 |
| −6 | 0010 | 1010 |
| −7 | 0001 | 1001 |
| −8 | 0000 | 1000 |
Offset binary may be converted into two's complement by inverting the most significant bit. For example, with 8-bit values, the offset binary value may be XORed with 0x80 in order to convert to two's complement. In specialised hardware it may be simpler to accept the bit as it stands, but to apply its value in inverted significance.
Related codes
 | This section is missing information about these tables. (January 2022) |
![{\displaystyle z={\frac {1}{q}}\left[\left(\sum _{i=1}^{n}p_{i}\times b_{i}\right)-k\right]}](https://wikimedia.org/api/rest_v1/media/math/render/svg/1f51fa9286ef962febbc5a12fd5f6b110c52bdf1)
| Code | Type | Parameters | Weights | Distance | Checking | Complement | Groups of 5 | Simple addition | ||
|---|---|---|---|---|---|---|---|---|---|---|
| Offset, k | Width, n | Factor, q | ||||||||
8421 code
|
n[8] | 0 | 4 | 1 | 8 4 2 1 | 1–4 | No | No | No | No |
| 3n + 2[8] | 2 | 5 | 3 | — | 2–5 | Yes | 9 | Yes | Yes | |
Stibitz code[10]
|
n + 3[8] | 3 | 4 | 1 | 8 4 −2 −1 | 1–4 | No | 9 | Yes | Yes |
| 27n + 6[8][12][13] | 6 | 8 | 27 | — | 3–8 | Yes | 9 | Yes | Yes | |
| 25n + 15[12][13] | 15 | 8 | 25 | — | 3+ | Yes | Yes | ? | Yes | |
| 23n + 24[12][13] | 24 | 8 | 23 | — | 3+ | Yes | Yes | ? | Yes | |
| 19n + 42[12][13] | 42 | 8 | 19 | — | 3–8 | Yes | 9 | Yes | Yes | |
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See also
- Signed number representations
- Binary number
- Excess-3
- Excess-128
- Exponent bias
- Excess-Gray code
- Ones' complement
- Binary offset carrier
References
- ^ The University of Auckland, NZ. p. 18. Retrieved 2016-02-04.
- ^ SBN 333-13360-9. Retrieved 2018-07-01. (270 pages) (NB. This is based on a translation of volume I of the two-volume German edition.)
- ^ ISBN 3-87145-272-6. (xii+327+3 pages) (NB. The German edition of volume I was published in 1969, 1971, two editions in 1972, and 1975. Volume II was published in 1970, 1972, 1973, and 1975.)
- ^ IBM System/360 Principles of Operation Form A22-6821. Various editions available on the WWW.[page needed]
- ISBN 0-8247-7956-8. Retrieved 2016-02-04.
- Intersil Corporation(published 2000). May 1997. AN9657.1. Retrieved 2016-02-04.
- ^ ISBN 978-3-528-13366-5. Retrieved 2020-05-26. (xviii+393 pages)
- ^ Burroughs Adding Machine Co.)
- ^ . (1 page)
- ^ Stibitz, George Robert (1954-02-09) [1941-04-19]. "Complex Computer". Patent US2668661A. Retrieved 2020-05-24. [1](102 pages)
- S2CID 40300278. (NB. Also published as Research Division Report 51-20 of University of Pennsylvaniain January 1951.)
- ^ S2CID 28263032.
- ^ LCCN 76-122262. (xii+560+4 pages)
Further reading
- Gosling, John B. (1980). "6.8.5 Exponent Representation". In Sumner, Frank H. (ed.). Design of Arithmetic Units for Digital Computers. Macmillan Computer Science Series (1 ed.). Department of Computer Science, . It is also referred to as an 'excess -' representation, where, for example, - is 64 for a 7-bit exponent (27−1 = 64). […]
- Savard, John J. G. (2018) [2006]. "Decimal Representations". quadibloc. Archived from the original on 2018-07-16. Retrieved 2018-07-16. (NB. Mentions Excess-3, Excess-6, Excess-11, Excess-123.)
- Savard, John J. G. (2018) [2007]. "Chen-Ho Encoding and Densely Packed Decimal". quadibloc. Archived from the original on 2018-07-03. Retrieved 2018-07-16. (NB. Mentions Excess-25, Excess-250.)
- Savard, John J. G. (2018) [2005]. "Floating-Point Formats". quadibloc. Archived from the original on 2018-07-03. Retrieved 2018-07-16. (NB. Mentions Excess-32, Excess-64, Excess-128, Excess-256, Excess-976, Excess-1023, Excess-1024, Excess-2048, Excess-16384.)
- Savard, John J. G. (2018) [2005]. "Computer Arithmetic". quadibloc. Archived from the original on 2018-07-16. Retrieved 2018-07-16. (NB. Mentions Excess-64, Excess-500, Excess-512, Excess-1024.)