Silicon nanowire
Silicon nanowires, also referred to as SiNWs, are a type of semiconductor
SiNWs have unique properties that are not seen in bulk (three-dimensional) silicon materials. These properties arise from an unusual quasi one-dimensional electronic structure and are the subject of research across numerous disciplines and applications. The reason that SiNWs are considered one of the most important one-dimensional materials is they could have a function as building blocks for nanoscale electronics assembled without the need for complex and costly fabrication facilities.
Applications
Owing to their unique physical and chemical properties, silicon nanowires are a promising candidate for a wide range of applications that draw on their unique physico-chemical characteristics, which differ from those of bulk silicon material.[1]
SiNWs exhibit charge trapping behavior which renders such systems of value in applications necessitating electron hole separation such as photovoltaics, and photocatalysts.[4] Recent experiment on nanowire solar cells has led to a remarkable improvement of the power conversion efficiency of SiNW solar cells from <1% to >17% in the last few years.[5]
Charge trapping behaviour and tuneable surface governed transport properties of SiNWs render this category of nanostructures of interest towards use as metal insulator semiconductors and field effect transistors,[6] with further applications as nanoelectronic storage devices,[7] in flash memory, logic devices as well as chemical and biological sensors.[3][8]
The ability for
Silicon nanowires are efficient thermoelectric generators because they combine a high electrical conductivity, owing to the bulk properties of doped Si, with low thermal conductivity due to the small cross section.[10]
Synthesis
Several synthesis methods are known for SiNWs and these can be broadly divided into methods which start with bulk silicon and remove material to yield nanowires, also known as top-down synthesis, and methods which use a chemical or vapor precursor to build nanowires in a process generally considered to be bottom-up synthesis.[3]
Top down synthesis methods
These methods use material removal techniques to produce nanostructures from a bulk precursor
- Laser beam ablation[3]
- Ion-beam etching[11]
- Thermal evaporation oxide-assisted growth (OAG)[12]
- Metal-assisted chemical etching (MaCE)[13]
Bottom-up synthesis methods
- Vapour–liquid–solid (VLS) growth – a type of catalysed CVD often using silane as Si precursor and gold nanoparticles as catalyst (or 'seed').[3]
- Precipitation from a solution – a variation of the VLS method, aptly named supercritical fluid liquid solid (SFLS), that uses a supercritical fluid (e.g. organosilane at high temperature and pressure) as Si precursor instead of vapor. The catalyst would be a colloid in solution, such as colloidal gold nanoparticles, and the SiNWs are grown in this solution[12][14]
Thermal oxidation
Subsequent to physical or chemical processing, either top-down or bottom-up, to obtain initial silicon nanostructures, thermal oxidation steps are often applied in order to obtain materials with desired size and
Outlook
There is significant interest in SiNWs for their unique properties and the ability to control size and aspect ratio with great accuracy. As yet, limitations in large-scale fabrication impede the uptake of this material in the full range of investigated applications. Combined studies of synthesis methods, oxidation kinetics and properties of SiNW systems aim to overcome the present limitations and facilitate the implementation of SiNW systems, for example, high quality vapor-liquid-solid–grown SiNWs with smooth surfaces can be reversibly stretched with 10% or more elastic strain, approaching the theoretical elastic limit of silicon, which could open the doors for the emerging “elastic strain engineering” and flexible bio-/nano-electronics.[16]
References
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- ^ Cui, Yi; Zhong, Zhaohui; Wang, Deli; Wang, Wayne U.; Lieber, Charles M. (2003). "High Performance Silicon Nanowire Field Effect Transistors". Nano Letters. 3 (2): 149–152. .
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