DEC 3000 AXP

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DEC 3000 AXP was the name given to a series of

).

All DEC 3000 AXP models used the DECchip 21064 (EV4) or DECchip 21064A (EV45) processor and inherited various features from the earlier MIPS architecture-based DECstation models, such as the TURBOchannel bus and the I/O subsystem.

The DEC 3000 AXP series was superseded in late 1994, with workstation models replaced by the AlphaStation line and server models replaced by the AlphaServer line.

Models

There were three DEC 3000 model families, codenamed Pelican, Sandpiper, and Flamingo. Within Digital, this led to the DEC 3000 series being affectionately referred to as "the seabirds".

Model	Codename	CPU	CPU MHz	B-cache (L2)	Chassis	Introduced	Withdrawn
Model 300	Pelican	EV4	150	256 KB	Desktop	1993-04-20[citation needed]	?
Model 300L	Pelica	EV4	100	256 KB	Desktop	1993-04-20[citation needed]	1994-03-25
Model 300X	Pelican+	EV4	175	256 KB	Desktop	1994-02-08	1995-10-02
Model 300LX	Pelica+	EV4	125	256 KB	Desktop	1994-02-08	1995-06-23
Model 400	Sandpiper	EV4	133	512 KB	Desktop	1992-11-10[citation needed]	?
Model 500	Flamingo	EV4	150	512 KB	Pedestal	1992-11-10[citation needed]	?
Model 500X	Hot Pink	EV4	200	512 KB	Pedestal	1993-04-20[citation needed]	?
Model 600	Sandpiper+	EV4	175	2 MB	Desktop	1993-10-13	1995-10-02
Model 700	Sandpiper45	EV45	225	2 MB	Desktop	1994-07-21[citation needed]	1995-10-02
Model 800	Flamingo II	EV4	200	2 MB	Pedestal	1993-10-13	1994-02-12
Model 900	Flamingo 45	EV45	275	2 MB	Pedestal	1994-07-21[citation needed]	1995-10-02

Note: Server configurations of the Model 400/500/600/700/800/900 systems were suffixed with "S".

Description

The logic in Flamingo- and Sandpiper-based systems are contained on two modules (

), the CPU module and the I/O module, with the CPU module being the largest board. The two modules are connected via a 210-pin connector. The logic in Pelican-based systems are contained the CPU module and system module. The CPU module is a daughterboard that plugs into the system module and contains the CPU and the B-cache (L2 cache).

The architecture of the Flamingo- and Sandpiper-based systems is based around a crossbar switch implemented by an ADDR (Address) ASIC, four SLICE (data slice) ASICs and a TC (TURBOchannel) ASIC. These ASICs connect the various different width buses used in the system, allowing data to be transferred to the different subsystems. PALs were used to implement the control logic. The cache, memory and TURBOchannel controllers, as well as other control logic, is entirely implemented by PALs. Pelican-based systems have an entirely different architecture from the other systems, similar to that of late-model Personal DECstations that they are based on, with a traditional workstation architecture with buses and buffers.

Memory

The Sandpiper and Flamingo used proprietary 100-pin, 40-bit (32 bits plus 8 bits ECC)

These were eight-way interleaved, providing a 256-bit-wide bus to memory. The Sandpiper had two such eight-SIMM banks, for up to 512 MB total system RAM, while the Flamingo had four banks and supported up to 1 GB. In comparison, the Pelican was a budget architecture utilising eight standard 72-pin Fast Page Mode SIMMs that were protected with longword parity instead of ECC, with capacities of 8 MB or 32 MB, for a total of up to 256 MB RAM. These were two-way interleaved, for a 64-bit-wide bus to memory.

Expansion slots

The DEC 3000 AXP series uses the 32-bit

ASIC

, which connected it to the SLICE data path ASICs. The number to expansion slots also varied, the 300 models had two slots, except for the 300L, which had none. Models 400, 600 and 700 had three slots, the model 500X featured five, while models 500, 800 and 900 featured six.

Graphics

The Model 300 Series and the Model 500, 500S and 500X feature integrated graphics provided by the CXTurbo subsystem, which resides on the system module. This subsystem is essentially an onboard HX TURBOchannel option module. The subsystem features a SFB (smart

ROM that holds part of the system firmware. The CXTurbo subsystem can reach resolutions of 1280 × 1024 at 72 Hz in the 300, 300X and 300LX models, 1024 × 768 at 72 Hz in the Model 300L and 1280 × 1024 at 66 Hz or 72 Hz in the Model 500, 500S and 500X.

Because of the DEC 3000 AXP's similarity with Digital's previous RISC workstation line, the DECstation, the same TURBOchannel graphics options, which consisted of framebuffers, 2D and 3D accelerated graphics, were carried over the DEC 3000 AXP. Like the DECstation, up to three (the actual number may be less, depending on the number of TURBOchannel option slots the system features) framebuffers of the same model can be installed in a single system to support multiscreen configurations.

Despite using the same graphics options as the DECstation at introduction, later options for the DEC 3000 AXP were designed exclusively for the platform. These options were Digital's ZLX-E1/E2/E3, ZLX-L1/L2 and ZLX-M1/M2 series of PixelVision architecture-based 2D/3D accelerated graphics and

. It connects to the DEC 3000 AXP via a cable and a TURBOchannel interface module.

I/O subsystem

The I/O subsystem provides the DEC 3000 AXP with

DS1287A.

SCSI interface

The DEC 3000 AXP used a TCDS (TURBOchannel Dual SCSI) ASIC to provide an interface between the

8-bit single ended SCSI buses. Later and higher end systems such as the Model 600, 700, 800 and 900 also feature two SCSI controllers, but used the NCR 53CF94-2 instead, which provided faster 10 MB/s 8-bit single ended SCSI buses.

Notes

References

• DEC 3000 600/600S/700 AXP Owner's Guide
• DEC 3000 300/400/500/600/700/800/900 AXP Models System Programmer's Manual, EK-D3SYS-PM.B01, July 1994, Digital Equipment Corporation

External links

• Paul Hardy's VMS CPU Model Summary
• Dutton, Todd A., Eiref, Daniel, Kurth, Hugh R., Reisert, James J., and Stewart, Robin L. (1992), "The Design of the DEC 3000 AXP Systems, Two High-performance Workstations", Digital Technical Journal 4(4).