R2000 microprocessor

The R2000 is a

and MIPS's own Unix workstations.

The chip set consisted of the R2000 microprocessor, R2010 floating-point accelerator, and four R2020 write buffer chips. The core R2000 chip executed all non-floating-point instructions with a simple short pipeline. This chip also controlled the external code and data caches, made of fast standard SRAM chips organized with direct indexing and one-cycle read latency. The R2000 chip contained a small translation lookaside buffer for mapping virtual memory addresses. The R2010 chip held the floating point registers, floating point data paths, and their longer simple pipeline. Writes to main memory DRAM took tens of cycles to fully complete. But the R2020 chips queued and completed up to 4 pending writes to main memory, allowing the R2000 core to proceed without stalling itself. In the absence of cache misses, this chip set sustained an instruction completion rate of one instruction per ALU cycle. This was much faster than non-RISC microprocessors of that time which needed several cycles per instruction. 1986 also saw similar technology in Sun's first SPARC microprocessor and Hewlett Packard's first PA-RISC microprocessor.

Overall speed was limited by the cache size and cache cycle time. The R2000 chip set and SRAM was initially sold only as a complete circuit board to ensure good cache bus timings. In 1987 system builders began using the chip set in arbitrary new board designs.

The R2000 was available in 8.3, 12.5 and 15 MHz grades. The die contained 110,000 transistors and measured 80 mm² in a 2.0 μm double-metal CMOS process. MIPS was a

, and Performance Semiconductor to also fabricate and market the R2000. Sierra and Toshiba continued to serve as foundries.

LSI fabricated the chip set in its 2.0 μm double-metal CMOS process and marketed it as the LR2000. Performance Semiconductor fabricated the chip set in its PACE-I 0.8 μm double-metal CMOS process and marketed it as the PR2000.

In 1988, an improved version was introduced, the R2000A. It was composed of the R2000A and R2010A ICs. It operated at 12.5 and 16.67 MHz. It has been used extensively in embedded applications such as printer controllers.

In 1988, the R2000 was followed by the R3000, using a similar overall system design but faster chip implementation.

References

• Furber, Stephen Bo (1989). VLSI RISC Architecture and Organization. p. 132. CRC Press.