Interrupt flag
The Interrupt flag (IF) is a flag
1
maskable interrupts are enabled. If reset (set to 0
) such interrupts will be disabled until interrupts are enabled. The Interrupt flag does not affect the handling of non-maskable interrupts (NMIs) or software interrupts generated by the INTSetting and clearing
In a system using
Privilege level
In systems that support privileged mode, only privileged applications (usually the OS
Old DOS programs
Some old
There are few satisfactory resolutions to this issue. It is usually not possible to modify the program, as source code is typically not available and there is no room in the instruction stream to introduce an STI without massive editing at the assembly level. Removing CLI's from the program or causing the V86 host to ignore CLI completely might cause other bugs if the guest's interrupt handlers aren't designed to be re-entrant (though when executed on a modern processor, they typically execute fast enough to avoid overlapping of interrupts).
Disabling interrupts
In the
Enabling Interrupts
The STI of the
In some implementations of the instruction which enables interrupts, interrupts are not enabled until after the next instruction. In this case the sequence of enabling interrupts immediately followed by disabling interrupts results in interrupts not being recognized.
Multiprocessor Considerations
The Interrupt flag only affects a single processor. In multiprocessor systems an interrupt handler must use other synchronization mechanisms such as locks.
See also
- Interrupt
- FLAGS register (computing)
- Intel 8259
- Advanced Programmable Interrupt Controller (APIC)
- Interrupt handler
- Non-maskable interrupt (NMI)
- Programmable Interrupt Controller(PIC)
- x86
References
- ^ a b "Intel Architecture Software Developer's Manual, Volume 2: Instruction Set Reference Manual" (PDF). Retrieved 2007-07-13.
External links
- Intel 64 and IA-32 Architectures Software Developer Manuals - Retrieved 2017-09-14