Freescale RS08
RS08 is a family of
embedded systems
.
Compared to its sibling
die size
.
The RS08 employs a
binary compatible with the S08 core, though the instruction opcodes and addressing modes
are a subset of the S08. This allows an easy transition from the S08 core to the RS08 core for designers and engineers.
Short and Tiny addressing modes allow for more efficient access and manipulation of the most commonly used variables and registers. These instructions have single-byte instruction opcodes, reducing the amount of program memory required by their frequent use.
Die size is 30% smaller than the S08 core. The RS08 core uses the same bus structure as S08, making memory and peripheral module reuse possible. It offers a
Background Debug Mode interface, a single-wire debugging
interface that allows interactive control over the processor when installed in a target system.
Devices
Devices (as of July 2010):
- MC9RS08KA1: 1 kB of Flash-programmable program memory.
- MC9RS08KA2: 2 kB of Flash-programmable program memory.
- MC9RS08LE4: 4 kB of Flash-programmable program memory, SCI.
- MC9RS08LA8: 8 kB of Flash-programmable program memory, SCI, SPI.
- MC9RS08KB12: 12 kB of Flash-programmable program memory, I2C, SCI.
Architectural features
- The RS08 core does not manage a return address in a Shadow Program Counter link register. If a subroutine in turn calls another subroutine, it can preserve the return address in a local variable, call subroutines as necessary, and restore the saved address just before returning.
- The core's Status register has Carry and Zero flag bits. Overflow and Negative, usually found in other cores, are not present.
Interrupt handling
Interrupts are not dispatched through interrupt vectors, as with nearly all other Freescale processors. RS08 interrupts can wake the processor from a WAIT or STOP condition (where execution is temporarily halted), but otherwise do not change program flow. In essence, RS08 runs any thread of programming to completion. The effect is vaguely similar to cooperative multitasking
in operating systems.
Though handling external events is synchronous, no overhead due to context switching is required, and low-power operation is possible. Interrupt arbitration is exclusively software-controlled.
Bibliography
- Freescale Semiconductor. RS08 Core Reference Manual (RS08RM). Rev. 1.0, 4/2006.
- Freescale Semiconductor. MC9RS08KA2 Data Sheet (MC9RS08KA2). Rev. 1.0, 4/2006