IBM 7030 Stretch
IBM Stretch | |
---|---|
kilobytes (262,144 x 64 bits)[1] | |
MIPS | 1.2 MIPS |
The IBM 7030, also known as Stretch, was IBM's first transistorized supercomputer. It was the fastest computer in the world from 1961 until the first CDC 6600 became operational in 1964.[2][3]
Originally designed to meet a requirement formulated by
The 7030 was much slower than expected and failed to meet its aggressive performance goals. IBM was forced to drop its price from $13.5 million to only $7.78 million and withdrew the 7030 from sales to customers beyond those having already negotiated contracts. PC World magazine named Stretch one of the biggest project management failures in IT history.[6]
Within IBM, being eclipsed by the smaller Control Data Corporation seemed hard to accept.[7] The project lead, Stephen W. Dunwell,[8] was initially made a scapegoat for his role in the "failure",[9] but as the success of the IBM System/360 became obvious, he was given an official apology and, in 1966 was made an IBM Fellow.[10]
In spite of Stretch's failure to meet its own performance goals, it served as the basis for many of the design features of the successful IBM System/360, which was announced in 1964 and first shipped in 1965.
Development history
In early 1955, Dr.
At IBM, a small team at
IBM returned to Livermore and stated that they were withdrawing from the contract, and instead proposed a dramatically better system, "We are not going to build that machine for you; we want to build something better! We do not know precisely what it will take but we think it will be another million dollars and another year, and we do not know how fast it will run but we would like to shoot for ten million instructions per second."[11]: 13 Livermore was not impressed, and in May 1955 they announced that UNIVAC had won the LARC contract, now called the Livermore Automatic Research Computer. LARC would eventually be delivered in June 1960.[12]
In September 1955, fearing that Los Alamos National Laboratory might also order a LARC, IBM submitted a preliminary proposal for a high-performance binary computer based on the improved version of the design that Livermore had rejected, which they received with interest. In January 1956, Project Stretch was formally initiated. In November 1956, IBM won the contract with the aggressive performance goal of a "speed at least 100 times the IBM 704" (i.e. 4 MIPS). Delivery was slated for 1960.
During design, it proved necessary to reduce the clock speeds, making it clear that Stretch could not meet its aggressive performance goals, but estimates of performance ranged from 60 to 100 times the IBM 704. In 1960, the price of $13.5 million was set for the IBM 7030. In 1961, actual benchmarks indicated that the performance of the IBM 7030 was only about 30 times the IBM 704 (i.e. 1.2 MIPS), causing considerable embarrassment for IBM. In May 1961, Thomas J. Watson Jr. announced a price cut of all 7030s under negotiation to $7.78 million and immediate withdrawal of the product from further sales.
Its floating-point addition time is 1.38–1.50 microseconds, multiplication time is 2.48–2.70 microseconds, and division time is 9.00–9.90 microseconds.
Technical impact
While the IBM 7030 was not considered successful, it spawned many technologies incorporated in future machines that were highly successful. The
Stephen Dunwell, the project manager who became a scapegoat when Stretch failed commercially, pointed out soon after the phenomenally successful 1964 launch of System/360 that most of its core concepts were pioneered by Stretch.[13] By 1966 he had received an apology and been made an IBM Fellow, a high honor that carried with it resources and authority to pursue one's desired research.[13]
Hardware implementation
The 7030 CPU uses
It uses the same core memory as the IBM 7090.[15]: 58
Installations
- Los Alamos Scientific Laboratory(LASL) in April 1961, accepted in May 1961, and used until June 21, 1971.
- Lawrence Livermore National Laboratory, Livermore, California delivered November 1961.[16]
- U.S. National Security Agency in February 1962 as the main CPU of the IBM 7950 Harvest system, used until 1976, when the IBM 7955 Tractor tape system developed problems due to worn cams that could not be replaced.
- Atomic Weapons Establishment, Aldermaston, England, delivered February 1962[16]
- U.S. Weather Bureau Washington D.C., delivered June/July 1962.[16]
- MITRE Corporation, delivered December 1962.[16] and used until August 1971. In the spring of 1972, it was sold to Brigham Young University, where it was used by the physics department until scrapped in 1982.
- U.S. Navy Dahlgren Naval Proving Ground, delivered Sep/Oct 1962.[16]
- Commissariat à l'énergie atomique, France, delivered November 1963.[16]
- IBM.
The Lawrence Livermore Laboratory's IBM 7030 (except for its
Architecture
Data formats
- Fixed-point numbers are variable in length, stored in either binary (1 to 64 bits) or decimal (1 to 16 digits) and either unsigned format or sign/magnitude format. In decimal format, digits are variable length bytes (4 to 8 bits).
- Floating pointnumbers have a 1-bit exponent flag, a 10-bit exponent, a 1-bit exponent sign, a 48-bit magnitude, and a 4-bit sign byte in sign/magnitude format.
- Alphanumeric characters are variable length and can use any character code of 8 bits or less.
- Bytes are variable length (1 to 8 bits).[17]
Instruction format
Instructions are either 32-bit or 64-bit.
Registers
The registers overlay the first 32 addresses of memory as shown.[18]
! Address | Mnemonic | Register | Stored in: |
---|---|---|---|
0 | $Z | 64-bit zero: always reads as zero, cannot be changed by writes | Main core storage |
1 | $IT | interval timer (bits 0..18): decremented at 1024 Hz, recycles about every 8.5 minutes, at zero it turns on the "time signal indicator" in the indicator register | Index core storage |
$TC | 36-bit time clock (bits 28..63): count of 1024 Hz ticks, bits 38..63 increment once per second, recycles each ~777 days. | ||
2 | $IA | 18-bit interruption address | Main core storage |
3 | $UB | 18-bit upper boundary address (bits 0-17) | Transistor register |
$LB | 18-bit lower boundary address (bits 32-49) | ||
1-bit boundary control (bit 57): determines whether addresses within or outside the boundary addresses are protected | |||
4 | 64-bit maintenance bits: only used for maintenance | Main core storage | |
5 | $CA | channel address (bits 12..18): readonly, set by the "exchange", an i/o processor | Transistor register |
6 | $CPUS | other CPU bits (bits 0..18): signaling mechanism for a cluster of up to 20 CPUs | Transistor register |
7 | $LZC | left zeroes count (bits 17..23): number of leading zero bits from a connective result or floating point operation | Transistor register |
$AOC | all-ones count (bits 44..50): count of bits set in connective result or decimal multiple or divide | ||
8 | $L | Left half of 128-bit accumulator | Transistor register |
9 | $R | Right half of 128-bit accumulator | |
10 | $SB | accumulator sign byte (bits 0..7) | |
11 | $IND | indicator register (bits 0..19) | Transistor register |
12 | $MASK | 64-bit mask register: bits 0..19 always 1, bits 20..47 writable, bits 48..63 always 0 | Transistor register |
13 | $RM | 64-bit remainder register: set by integer and floating point divide instructions only | Main core storage |
14 | $FT | 64-bit factor register: changed only by the "load factor" instruction | Main core storage |
15 | $TR | 64-bit transit register | Main core storage |
16 ... 31 |
$X0 ... $X15 |
64-bit index registers (sixteen) | Index core storage |
The accumulator and index registers operate in sign-and-magnitude format.
Memory
Main memory is 16K to 256K 64-bit binary words, in banks of 16K.
The memory was immersion oil-heated/cooled to stabilize its operating characteristics.
Software
- STRETCH Assembly Program (STRAP)
- MCP (not to be confused with the Burroughs MCP)
- COLASL and IVY programming languages[19]
- FORTRAN programming language[20]
- SOS (Stretch Operating System) Written at the BYU Scientific Computing Center as an upgrade to MCP, along with an updated variant of FORTRAN.
See also
- IBM 608, the first commercially available transistorized computing device
- ILLIAC II, a transistorized super computer from The University of Illinois that competed with Stretch.
Notes
References
- ^ a b c BRL Report 1961
- ISBN 978-0309312653.
- ISBN 978-1291595093.
- ^ "Some Early UK FORTRAN Compilers".
- ^ "HARTRAN Overview".
- PCWorld. Retrieved October 23, 2012.
- ^ As noted in the famous "Janitor" memo, wherein IBM CEO T. J. Watson Jr asked "why we have lost our industry leadership" to "34 people, including the janitor.""Watson Jr. memo about CDC 6600". August 28, 1963.
- ^ "IBM Archives: Stephen W. Dunwell". IBM.
- ^ "Stretch was considered a commercial failure, and Dunwell was sent into ..." Smotherman, Mark; Spicer, Dag. "IBM's Single-Processor Supercomputer Efforts".
- ^ " to pursue any research he wished." Wolfgang Saxon (March 24, 1994). "S. W. Dunwell, 80, Engineer at I.B.M.; Designed Computers". The New York Times.
- ^ a b c d Bob Evans (Summer 1984). "IBM System/360". The Computer Museum Report. pp. 8–18.
- ^ Charles Cole. "The Remington Rand Univac LARC".
- ^ ISBN 978-0805931167. The memoir of a senior IBM executive, giving his recollections of his and IBM's experience from World War II into the 1970s.
- ISSN 0018-8646.
- ^ a b c d Erich Bloch (1959). The Engineering Design of the Stretch Computer (PDF). Eastern Joint Computer Conference.
- ^ a b c d e f "TIMELINE OF THE IBM STRETCH/HARVEST ERA (1956-1961)". Retrieved June 13, 2021.
- ^ Mark Smotherman (July 2010). "IBM Stretch (7030) — Aggressive Uniprocessor Parallelism". clemson.edu. Retrieved 2013-12-07.
- ^ "IBM 7030 Data Processing System Reference Manual" (PDF). bitsavers.org. IBM. 1961. p. 34..38. Retrieved 2015-05-05.
- ^ Roger B. Lazarus (1978). Computing at LASL in the 1940s and 1950s. United States Department of Energy. pp. 14–15.
- ^ "The IBM 7030 FORTRAN System" (PDF). Computer History Museum. IBM Stretch Collection: International Business Machines Corporation. 1961. p. 36. Retrieved 28 February 2015.
Further reading
- S2CID 43480009.
External links
- Oral history interview with Gene Amdahl Charles Babbage Institute, University of Minnesota, Minneapolis. Amdahl discusses his role in the design of several computers for IBM including the STRETCH, IBM 701, 701A, and IBM 704. He discusses his work with Nathaniel Rochesterand IBM's management of the design process for computers.
- IBM Stretch Collections @ Computer History Museum
- 7030 Data Processing System (IBM Archives)
- IBM Stretch (aka IBM 7030 Data Processing System)
- Organization Sketch of IBM Stretch
- BRL report on the IBM Stretch
- Planning a Computer System – Project Stretch, 1962 book.
- IBM 7030 documents at Bitsavers.org (PDF files)