List of AMD CPU microarchitectures

The following is a list of AMD CPU microarchitectures.

Nomenclature

Historically, AMD's CPU families were given a "K-number" (which originally stood for

The Family hexadecimal identifier number can be determined for a particular processor using the freeware system profiling application CPU-Z, which shows the Family number in the Ext. Family field of the application, as can be seen on various screenshots on the CPU-Z Validator World Records website.

x86 microarchitectures

Below is a list of microarchitectures many of which have

• Pentium
  .
• AMD K6 – the K6 was not based on the K5 and was instead based on the Nx686 processor that was being designed by NexGen when that company was bought by AMD. The K6 was generally pin-compatible with the Intel Pentium (unlike NexGen's existing processors).
  • SIMD
    instructions.
  • AMD K6-III Sharptooth – a further improved K6 with three levels of cache – 64 KB L1, 256 KB full-speed on-die L2, and a variable (up to 2 MB) L3.
• microprocessors. Was a very advanced design for its day. First generation was built with a separate L2-cache chip on a board inserted into a slot (A) and introduced extended MMX. The second generation returned to the traditional socket form factor with fully integrated L2-cache running at full speed. The third generation, branded as XP, introduced full support for SSE
  .
• L2 cache sizes up to 1 MB (1128 KB total cache), and SSE2. Later K8 added SSE3. The K8 was the first mainstream Windows-compatible 64-bit microprocessor and was released April 22, 2003. K8 replaced the traditional front-side bus with a HyperTransport
  communication fabric. SledgeHammer was the first design which implemented it.
• AMD K9 – unfinished successor to K8. The codename was recycled at least once until ultimately being dropped before any public mention of it.
• AMD-V Nested Paging virtualization
  , and HyperTransport 3.0 are introduced. Barcelona was the first design which implemented it.
• Turion X2 Ultra / Puma mobile platform
  .
• APU
  .
• AMD Bobcat Family 14h – a new distinct line, which is aimed in the 1 W to 10 W low power microprocessor category. Ontario and Zacate were the first designs which implemented it.
  • AMD Jaguar Family 16h – the successor to Bobcat. Kabini and Temash. CPUID model numbers are 00h-0Fh.
  • AMD Puma Family 16h (2nd-gen) – the successor to Jaguar. Beema and Mullins. CPUID model numbers are 30h-3Fh.
• CVT16
  instruction sets. Orochi was the first design which implemented it. For Bulldozer, CPUID model numbers are 00h and 01h.
  • AMD Piledriver Family 15h (2nd-gen) – second generation Bulldozer (First optimisation). CPUID model numbers are 02h (earliest "Vishera" Piledrivers) and 10h-1Fh.
  • AMD Steamroller Family 15h (3rd-gen) – third-generation Bulldozer (Second optimisation and die shrink to 28 nm). CPUID model numbers are 30h-3Fh.
  • AMD Excavator Family 15h (4th-gen) – fourth-generation Bulldozer (Final optimisation). CPUID model numbers are 60h-6Fh, later updated revisions have model numbers 70h-7Fh.
• Ryzen and Epyc
  CPU lines.
  • 14 nm
    process. First AMD architecture to implement simultaneous multithreading and Infinity Fabric.
  • AMD Zen+ Family 17h – revised Zen architecture (optimisation and die shrink to 12 nm).
  • chiplet technology.^[3]
  • AMD Zen 3 Family 19h – third generation Zen architecture in the optimised 7 nm process with major core redesigns.^[4]
  • Ryzen 6000
    mobile processors using a 6 nm process.
  • Ryzen 7000 consumer processors on the new AM5 platform with DDR5 and PCIe 5.0 support. Adds support for AVX-512
    instruction set.
  • AMD Zen 5 Family 1Ah – successor to the Zen 4 architecture, planned in 3 nm.^[6]