Apollo PRISM
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PRISM (Parallel Reduced Instruction Set Multiprocessor) was
PRISM was based on what would be known today as a
Compilers
The
In some respects, the VLIW design can be thought of as "super-RISCy", as it offloads the instruction selection process to the compiler as well. In the VLIW design, the compiler examines the code and selects instructions that are known to be "safe", and then packages them into longer instruction words. For instance, for a CPU with two functional units, like the PRISM, the compiler would find pairs of safe instructions and stuff them into a single larger word. Inside the CPU, the instructions are simply split apart again, and fed into the selected units.
This design minimizes logical changes to the CPU as functional units are added, as the compiler is handling the instruction selection. However, this also ties the compiled code very tightly to the processor design; for instance, if a new generation of the CPU adds additional functional units, all programs running on it must be re-compiled so the compiler can re-arrange the instructions again, perhaps four-wide instead of two-wide. In comparison, a more traditional design like the PowerPC (PPC) has seen dramatic internal changes, yet code written for the first PPC's will still run without modification on the latest versions. The cost for this is an increasing amount of chip space that has to be dedicated to instruction scheduling.
The Apollo compilers were the first commercial compilers to use
Architectural features
PRISM was a "pure"
History
The original PRISM design was introduced in 1988 in the one-to-four-CPU Apollo DN10000 workstations. The "DN" in the name refers to "Domain Node", Domain/OS being the Unix-like operating system used on all of Apollo's machines. Note that PRISM was a multi-chip CPU board, not a single microprocessor; this was fairly common for high-end CPUs at the time.
Approximately one thousand DN10000 systems were sold.
PRISM II, running at twice the clock speed, was delayed by problems in
The PRISM was claimed to be the fastest CPU on the market during its short life-span.[1] Benchmarking indicated that the speed of the DN10000's CPU was comparable to that of the MIPS M/2000-6, a 20 MHz R3000,[2] but the DN10000 as a system had around twice the performance of the MIPS M/2000-6.[3] In comparison with common RISC designs of the era, the PRISM was effectively two CPUs in one, making it roughly double the performance of a RISC CPU running at the same clock speed.[citation needed]
Contemporary competitors
Although the Intel i860 also used a VLIW (or properly LIW in both cases, as two is not "very" long), extracting performance from the i860 proved notoriously difficult, and in practice the PRISM was much faster.
Digital Equipment Corporation also engineered a RISC chip named PRISM during the same era, but that project was canceled in 1988, and never entered production.
References
- ^ Bayko, John (May 2003). "Section 5, Part II: Apollo PRISM - Superworkstation". Great Microprocessors of the Past and Present. Retrieved 8 March 2023.
- ^ M/2000 RISComputer. MIPS Computer Systems. p. 10. Retrieved 8 March 2023.
- ^ "Benchmarks: speed versus cost". IEEE Micro. April 1989. p. 83. Retrieved 8 March 2023.