Direct Rendering Manager

Source: Wikipedia, the free encyclopedia.
Not to be confused with digital rights management.
Original author(s)kernel.org & freedesktop.org
Developer(s)kernel.org & freedesktop.org
Written inC
Type
License
Websitedri.freedesktop.org/wiki/DRM

The Direct Rendering Manager (DRM) is a subsystem of the

Wayland and standalone applications and libraries such as SDL2 and Kodi
.

User-space programs can use the DRM API to command the GPU to do

video decoding, as well as GPGPU computing
.

Overview

The

their own memory to dispatch commands to the GPU and also require management of buffers and free space within that memory.[3] Initially, user-space programs (such as the X Server) directly managed these resources, but they usually acted as if they were the only ones with access to them. When two or more programs tried to control the same hardware at the same time, and set its resources each one in its own way, most times they ended catastrophically.[3]

Access to video card without DRM
Without DRM
Access to video card with DRM
With DRM
DRM allows multiple programs concurrent access to the 3D video card, avoiding collisions.

The Direct Rendering Manager was created to allow multiple programs to use video hardware resources cooperatively.[4] The DRM gets exclusive access to the GPU and is responsible for initializing and maintaining the command queue, memory, and any other hardware resource. Programs wishing to use the GPU send requests to DRM, which acts as an arbitrator and takes care to avoid possible conflicts.

The scope of DRM has been expanded over the years to cover more functionality previously handled by user-space programs, such as framebuffer managing and

kernel mode-setting
(KMS), and the terminology prevails when the functionality they provide is specifically alluded. But they are really parts of the whole kernel DRM subsystem.

The trend to include two GPUs in a computer—a discrete GPU and an integrated one—led to new problems such as GPU switching that also needed to be solved at the DRM layer. In order to match the Nvidia Optimus technology, DRM was provided with GPU offloading abilities, called PRIME.[7]

Software architecture

A process using the Direct Rendering Manager of the Linux Kernel to access a 3D accelerated graphics card

The Direct Rendering Manager resides in

API
.

A

function written in C for every ioctl of the DRM API, as well as constants, structures and other helper elements.[10] The use of libdrm not only avoids exposing the kernel interface directly to applications, but presents the usual advantages of reusing
and sharing code between programs.

Direct Rendering Manager architecture details: DRM core and DRM driver (including GEM and KMS) interfaced by libdrm

DRM consists of two parts: a generic "DRM core" and a specific one ("DRM driver") for each type of supported hardware.[11] DRM core provides the basic framework where different DRM drivers can register and also provides to user space a minimal set of ioctls with common, hardware-independent functionality.[8] A DRM driver, on the other hand, implements the hardware-dependent part of the API, specific to the type of GPU it supports; it should provide the implementation of the remaining ioctls not covered by DRM core, but it may also extend the API, offering additional ioctls with extra functionality only available on such hardware.[8] When a specific DRM driver provides an enhanced API, user-space libdrm is also extended by an extra library libdrm-driver that can be used by user space to interface with the additional ioctls.

API

The DRM core exports several interfaces to user-space applications, generally intended to be used through corresponding libdrm wrapper functions. In addition, drivers export device-specific interfaces for use by user-space drivers and device-aware applications through ioctls and sysfs files. External interfaces include: memory mapping, context management, DMA operations, AGP management, vblank control, fence management, memory management, and output management.

DRM-Master and DRM-Auth

There are several operations (ioctls) in the DRM API that either for security purposes or for concurrency issues must be restricted to be used by a single user-space process per device.

file handle
marked as master, specifically the first calling the SET_MASTER ioctl. Any attempt to use one of these restricted ioctls without being the DRM-Master will return an error. A process can also give up its master role—and let another process acquire it—by calling the DROP_MASTER ioctl.

The

display server
—is commonly the process that acquires the DRM-Master status in every DRM device it manages, usually when it opens the corresponding device node during its startup, and keeps these privileges for the entire graphical session until it finishes or dies.

For the remaining user-space processes there is another way to gain the privilege to invoke some restricted operations on the DRM device called DRM-Auth. It is basically a method of authentication against the DRM device, in order to prove to it that the process has the DRM-Master's approval to get such privileges. The procedure consists of:[12]: 13 

Graphics Execution Manager

Due to the increasing size of

Linux desktops needed an optimal way to share off-screen buffers with the compositing manager. These requirements led to the development of new methods to manage graphics buffers inside the kernel. The Graphics Execution Manager (GEM) emerged as one of these methods.[6]

GEM provides an API with explicit memory management primitives.[6] Through GEM, a user-space program can create, handle and destroy memory objects living in the GPU video memory. These objects, called "GEM objects",[14] are persistent from the user-space program's perspective and don't need to be reloaded every time the program regains control of the GPU. When a user-space program needs a chunk of video memory (to store a framebuffer, texture or any other data required by the GPU[15]), it requests the allocation to the DRM driver using the GEM API. The DRM driver keeps track of the used video memory and is able to comply with the request if there is free memory available, returning a "handle" to user space to further refer the allocated memory in coming operations.[6][14] GEM API also provides operations to populate the buffer and to release it when it is not needed anymore. Memory from unreleased GEM handles gets recovered when the user-space process closes the DRM device file descriptor—intentionally or because it terminates.[16]

GEM also allows two or more user-space processes using the same DRM device (hence the same DRM driver) to share a GEM object.[16] GEM handles are local 32-bit integers unique to a process but repeatable in other processes, therefore not suitable for sharing. What is needed is a global namespace, and GEM provides one through the use of global handles called GEM names. A GEM name refers to one, and only one, GEM object created within the same DRM device by the same DRM driver, by using a unique 32-bit integer. GEM provides an operation flink to obtain a GEM name from a GEM handle.[16][12]: 16  The process can then pass this GEM name (32-bit integer) to another process using any IPC mechanism available.[12]: 15  The GEM name can be used by the recipient process to obtain a local GEM handle pointing to the original GEM object.

Unfortunately, the use of GEM names to share buffers is not secure.

DMA-BUF support into DRM, as DMA-BUF represents buffers in userspace as file descriptors, which may be shared securely
.

Another important task for any video-memory management system besides managing the video-memory space is handling the memory synchronization between the GPU and the CPU. Current memory architectures are very complex and usually involve various levels of caches for the system memory and sometimes for the video memory too. Therefore, video-memory managers should also handle the cache coherence to ensure the data shared between CPU and GPU is consistent.[20] This means that often video-memory management internals are highly dependent on hardware details of the GPU and memory architecture, and thus driver-specific.[21]

GEM was initially developed by

integrated GPUs with a Uniform Memory Architecture (UMA), where the GPU and CPU share the physical memory, and there is not a dedicated VRAM.[22] GEM defines "memory domains" for memory synchronization, and while these memory domains are GPU-independent,[6] they are specifically designed with an UMA memory architecture in mind, making them less suitable for other memory architectures like those with a separate VRAM. For this reason, other DRM drivers have decided to expose to user-space programs the GEM API, but internally they implemented a different memory manager better suited for their particular hardware and memory architecture.[23]

The GEM API also provides ioctls for control of the execution flow (command buffers), but they are Intel-specific, to be used with Intel i915 and later GPUs.[6] No other DRM driver has attempted to implement any part of the GEM API beyond the memory-management specific ioctls.

Translation Table Maps

Translation Table Maps (TTM) is the name of the generic memory manager for GPUs that was developed before GEM.

Graphics Address Remapping Table (GART).[5]
TTM should also handle the portions of the video RAM that are not directly addressable by the CPU and do it with the best possible performance, considering that user-space graphics applications typically work with large amounts of video data. Another important matter was to maintain the consistency between the different memories and caches involved.

The main concept of TTM are the "buffer objects", regions of video memory that at some point must be addressable by the GPU.[5] When a user-space graphics application wants access to a certain buffer object (usually to fill it with content), TTM may require relocating it to a type of memory addressable by the CPU. Further relocations—or GART mapping operations—could happen when the GPU needs access to a buffer object but it isn't in the GPU's address space yet. Each of these relocation operations must handle any related data and cache-coherency issues.[5]

Another important TTM concept is fences. Fences are essentially a mechanism to manage concurrency between the CPU and the GPU.[24] A fence tracks when a buffer object is no longer used by the GPU, generally to notify any user-space process with access to it.[5]

The fact that TTM tried to manage all kind of memory architectures, including those with and without a dedicated VRAM, in a suitable way, and to provide every conceivable feature in a memory manager for use with any type of hardware, led to an overly complex solution with an API far larger than needed.[24][14] Some DRM developers thought that it wouldn't fit well with any specific driver, especially the API. When GEM emerged as a simpler memory manager, its API was preferred over the TTM one. But some driver developers considered that the approach taken by TTM was more suitable for discrete video cards with dedicated video memory and IOMMUs, so they decided to use TTM internally, while exposing their buffer objects as GEM objects and thus supporting the GEM API.[23] Examples of current drivers using TTM as an internal memory manager but providing a GEM API are the radeon driver for AMD video cards and the nouveau driver for NVIDIA video cards.

DMA Buffer Sharing and PRIME

The DMA Buffer Sharing API (often abbreviated as DMA-BUF) is a

API designed to provide a generic mechanism to share DMA buffers across multiple devices, possibly managed by different types of device drivers.[25][26] For example, a Video4Linux device and a graphics adapter device could share buffers through DMA-BUF to achieve zero-copy of the data of a video stream produced by the first and consumed by the latter. Any Linux device driver
can implement this API as exporter, as user (consumer) or both.

This feature was exploited for the first time in DRM to implement PRIME, a solution for GPU offloading that uses DMA-BUF to share the resulting framebuffers between the DRM drivers of the discrete and the integrated GPU.[27]: 13  An important feature of DMA-BUF is that a shared buffer is presented to user space as a file descriptor.[14][12]: 17  For the development of PRIME two new ioctls were added to the DRM API, one to convert a local GEM handle to a DMA-BUF file descriptor and another for the exact opposite operation.

These two new ioctls were later reused as a way to fix the inherent unsafety of GEM buffer sharing.

Wayland
.

Kernel Mode Setting

There must be a "DRM master" in user-space, this program has exclusive access to KMS.

In order to work properly, a video card or graphics adapter must set a

display controller.[31][32] A mode-setting operation must be performed before starting to use the framebuffer
, and also when the mode is required to change by an application or the user.

In early days, the user space programs that wanted to use the graphical framebuffer were also responsible for providing the mode-setting operations,

XRandR
extension.

However, this was not the only code doing mode-setting in a

VESA BIOS extensions).[40] Also the Linux kernel framebuffer driver contained mode-setting code to configure framebuffer devices.[2] To avoid mode-setting conflicts, the XFree86 Server—and later the X.Org Server—handled the case when the user switched from the graphical environment to a text virtual console by saving its mode-setting state, and restoring it when the user switched back to X.[41] This process caused an annoying flicker in the transition, and also can fail, leading to a corrupted or unusable output display.[42]

The user space mode setting approach also caused other issues:[43][42]

  • The suspend/resume process has to rely on user space tools to restore the previous mode. One single failure or crash of one of these programs could leave the system without a working display due to a modeset misconfiguration, and therefore unusable.
  • It was also impossible for the kernel to show error or debug messages when the screen was in a graphics mode—for example when X was running—since the only modes the kernel knew about were the VESA BIOS standard text modes.
  • A more pressing issue was the proliferation of graphical applications bypassing the X Server and the emergence of other graphics stack alternatives to X, extending the duplication of mode-setting code across the system even further.

To address these problems, the mode-setting code was moved to a single place inside the kernel, specifically to the existing DRM module.[36][37][44][42][43] Then, every process—including the X Server—should be able to command the kernel to perform mode-setting operations, and the kernel would ensure that concurrent operations don't result in an inconsistent state. The new kernel API and code added to the DRM module to perform these mode-setting operations was called Kernel Mode-Setting (KMS).[30]

Kernel Mode-Setting provides several benefits. The most immediate is of course the removal of duplicate mode-setting code, from both the kernel (Linux console, fbdev) and user space (X Server DDX drivers). KMS also makes it easier to write alternative graphics systems, which now don't need to implement their own mode-setting code.[42][43] By providing centralized mode management, KMS solves the flickering issues while changing between console and X, and also between different instances of X (fast user switching).[41][44] Since it is available in the kernel, it can also be used at the beginning of the boot process, saving flickering due to mode changes in these early stages.

The fact that KMS is part of the kernel allows it to use resources only available at kernel space such as

hotplug of new display devices easily, solving a longstanding problem.[45] Mode-setting is also closely related to memory management—since framebuffers are basically memory buffers—so a tight integration with the graphics memory manager is highly recommended. That's the main reason why the kernel mode-setting code was incorporated into DRM and not as a separate subsystem.[44]

To avoid breaking backwards compatibility of the DRM API, Kernel Mode-Setting is provided as an additional driver feature of certain DRM drivers.[46] Any DRM driver can choose to provide the DRIVER_MODESET flag when it registers with the DRM core to indicate that supports the KMS API.[8] Those drivers that implement Kernel Mode-Setting are often called KMS drivers as a way to differentiate them from the legacy—without KMS—DRM drivers.

KMS has been adopted to such an extent that certain drivers which lack 3D acceleration (or for which the hardware vendor doesn't want to expose or implement it) nevertheless implement the KMS API without the rest of the DRM API, allowing display servers (like Wayland) to run with ease.[47][48]

KMS device model

KMS models and manages the output devices as a series of abstract hardware blocks commonly found on the display output pipeline of a

display controller. These blocks are:[49]

  • CRTCs: each CRTC (from
    video mode timing signal with the help of a PLL circuit.[51] The number of CRTCs available determines how many independent output devices the hardware can handle at the same time, so in order to use multi-head configurations at least one CRTC per display device is required.[49] Two—or more—CRTCs can also work in clone mode if they scan out from the same framebuffer to send the same image to several output devices.[51][50]
  • Connectors: a connector represents where the display controller sends the video signal from a scanout operation to be displayed. Usually, the KMS concept of a connector corresponds to a physical connector (VGA, DVI, FPD-Link, HDMI, DisplayPort, S-Video, ...) in the hardware where an output device (monitor, laptop panel, ...) is permanently or can temporarily be attached. Information related to the current physically attached output device—such as connection status, EDID data, DPMS status or supported video modes—is also stored within the connector.[49]
  • Encoders: the display controller must encode the video mode timing signal from the CRTC using a format suitable for the intended connector.[49] An encoder represents the hardware block able to do one of these encodings. Examples of encodings—for digital outputs—are TMDS and LVDS; for analog outputs such as VGA and TV out, specific DAC blocks are generally used. A connector can only receive the signal from one encoder at a time,[49] and each type of connector only supports some encodings. There also might be additional physical restrictions by which not every CRTC is connected to every available encoder, limiting the possible combinations of CRTC-encoder-connector.
  • Planes: a plane is not a hardware block but a memory object containing a buffer from which a scanout engine (a CRTC) is fed. The plane that holds the framebuffer is called the primary plane, and each CRTC must have one associated,[49] since it is the source for the CRTC to determine the video mode—display resolution (width and height), pixel size, pixel format, refresh rate, etc. A CRTC might have also cursor planes associated to it if the display controller supports hardware cursor overlays, or secondary planes if it's able to scan out from additional hardware overlays and compose or blend "on the fly" the final image sent to the output device.[33]

Atomic Display

In recent years there has been an ongoing effort to bring

page flipping operations.[33][52]
This enhanced KMS API is what is called Atomic Display (formerly known as atomic mode-setting and atomic or nuclear pageflip).

The purpose of the atomic mode-setting is to ensure a correct change of mode in complex configurations with multiple restrictions, by avoiding intermediate steps which could lead to an inconsistent or invalid video state;[52] it also avoids risky video states when a failed mode-setting process has to be undone ("rollback").[53]: 9  Atomic mode-setting allows one to know beforehand if certain specific mode configuration is appropriate, by providing mode testing capabilities.[52] When an atomic mode is tested and its validity confirmed, it can be applied with a single indivisible (atomic) commit operation. Both test and commit operations are provided by the same new ioctl with different flags.

Atomic page flip on the other hand allows to update multiple planes on the same output (for instance the primary plane, the cursor plane and maybe some overlays or secondary planes) all synchronized within the same VBLANK interval, ensuring a proper display without tearing.[53]: 9,14 [52] This requirement is especially relevant to mobile and embedded display controllers, that tend to use multiple planes/overlays to save power.

The new atomic API is built upon the old KMS API. It uses the same model and objects (CRTCs, encoders, connectors, planes, ...), but with an increasing number of object properties that can be modified.[52] The atomic procedure is based on changing the relevant properties to build the state that we want to test or commit. The properties we want to modify depend on whether we want to do a mode-setting (mostly CRTCs, encoders and connectors properties) or page flipping (usually planes properties). The ioctl is the same for both cases, the difference being the list of properties passed with each one.[54]

Render nodes

In the original DRM API, the DRM device /dev/dri/cardX is used for both privileged (modesetting, other display control) and non-privileged (rendering,

GPGPU compute) operations.[9] For security reasons, opening the associated DRM device file requires special privileges "equivalent to root-privileges".[55] This leads to an architecture where only some reliable user space programs (the X server, a graphical compositor, ...) have full access to the DRM API, including the privileged parts like the modeset API. Other user space applications that want to render or make GPGPU computations should be granted by the owner of the DRM device ("DRM Master") through the use of a special authentication interface.[56] Then the authenticated applications can render or make computations using a restricted version of the DRM API without privileged operations. This design imposes a severe constraint: there must always be a running graphics server (the X Server, a Wayland compositor, ...) acting as DRM-Master of a DRM device so that other user space programs can be granted the use of the device, even in cases not involving any graphics display like GPGPU computations.[55][56]

The "render nodes" concept tries to solve these scenarios by splitting the DRM user space API into two interfaces – one privileged and one non-privileged – and using separate device files (or "nodes") for each one.

file system permissions to open the device file. Display servers, compositors and any other program that requires the modeset API or any other privileged operation must open the standard primary node that grants access to the full DRM API and use it as usual. Render nodes explicitly disallow the GEM flink operation to prevent buffer sharing using insecure GEM global names; only PRIME (DMA-BUF) file descriptors can be used to share buffers with another client, including the graphics server.[9][56]

Hardware support

Main article: Free and open-source graphics device driver
Linux System Call Interface to access DRM. DRM augments the Linux System Call Interface with own system calls.[57]

The Linux DRM subsystem includes free and open-source drivers to support hardware from the 3 main manufacturers of GPUs for desktop computers (AMD, NVIDIA and Intel), as well as from a growing number of mobile GPU and System on a chip (SoC) integrators. The quality of each driver varies highly, depending on the degree of cooperation by the manufacturer and other matters.

DRM drivers
Driver Since kernel Supported hardware Vendor support Status/Notes
radeon 2.4.1
Kaveri
APUs. 		Yes Active
i915 2.6.9
Intel HD and Iris Graphics
HD Graphics 2000/3000/2500/4000/4200/4400/4600/P4600/P4700/5000, Iris Graphics 5100, Iris Pro Graphics 5200 integrated GPUs. 		Yes Active
nouveau 2.6.33[58][59]
X1
SoC 		Partial Active
exynos 3.2[60] Samsung ARM-based Exynos SoCs
vmwgfx 3.2 (from staging)[61] Virtual GPU for the VMware SVGA2 virtual driver
gma500 3.3 (from staging)[62][63] Intel
GMA 500 and other Imagination Technologies (PowerVR
) based graphics GPUs 		experimental 2D KMS-only driver
ast 3.5[64] ASpeed Technologies 2000 series experimental
mgag200 3.5[65] Matrox MGA-G200 server display engines KMS-only
shmobile 3.7[66] Renesas SH Mobile
tegra 3.8[67] Nvidia Tegra20, Tegra30 SoCs Yes Active
omapdrm 3.9[68] Texas Instruments OMAP5 SoCs
rcar-du 3.11[69] Renesas R-Car SoC Display Units
msm 3.12[70][71] Qualcomm's Adreno A2xx/A3xx/A4xx GPU families (Snapdragon SOCs)[72]
armada 3.13[73][74]
Marvell
Armada 510 SoCs
bochs 3.14[75] Virtual
VGA cards using the Bochs dispi vga interface (such as QEMU
stdvga) 		virtual driver
sti 3.17[76][77] STMicroelectronics SoC stiH41x series
imx 3.19 (from staging)[78][79]
Freescale i.MX
SoCs
rockchip 3.19[78][80] Rockchip SoC-based GPUs KMS-only
amdgpu[57] 4.2[81][82]
Bristol & Stoney Ridge
APUs. 		Yes Active
virtio 4.2[84] Virtual GPU driver for QEMU based virtual machine managers (like KVM or Xen) virtual driver
vc4 4.4[85][86][87] Raspberry Pi's Broadcom BCM2835 and BCM2836 SoCs (VideoCore IV GPU)
etnaviv 4.5[88][89][90]
Marvell ARMADA and Freescale i.MX6 Series
sun4i 4.7[91][92]
Mali-400
GPU)
kirin 4.7[93][92]
Mali 450-MP4
GPU)
mediatek 4.7[94][92] MediaTek MT8173 SoC (Imagination PowerVR GX6250 GPU)
hibmc 4.10[95] HiSilicon hi1710
iBMC SoC (Silicon Image SM750 GPU core[96]
) 		KMS-only
vkms 4.19[97][98] Software-only model of a KMS driver that is useful for testing and for running
headless machines
. 		virtual driver, experimental
lima 5.2[99][100]
ARM Mali
4xx GPUs
panfrost 5.2[101][100] ARM Mali Txxx (Midgard) and Gxx (Bifrost) GPUs
vboxvideo 5.2 (from staging)[102][100] Virtual GPU driver for VirtualBox (VBoxVGA GPU) virtual driver
hyperv_drm 5.14[103][104] Virtual GPU driver for Hyper-V synthetic video device virtual driver
simpledrm 5.14[105][106] GPU Driver for firmware-provided framebuffers (
UEFI GOP, VESA BIOS Extensions, embedded systems
)
ofdrm 6.2[107][108] GPU Driver for Open Firmware framebuffers
loongson 6.6[109][110] GPU Driver for Loongson GPUs and SoCs
powervr 6.8[111][112] Imagination Technologies PowerVR (Series 6 and later) & IMG Graphics GPUs
xe 6.8[113][114] Intel Xe series GPUs (Gen12 integrated GPUs, Intel Arc discrete GPUs) Yes experimental

There is also a number of drivers for old, obsolete hardware detailed in the next table for historical purposes.

Historic DRM drivers
Driver Since kernel Supported hardware Status/Notes
gamma 2.3.18 3Dlabs GLINT GMX 2000 Removed since 2.6.14[115]
ffb 2.4 Creator/Creator3D (used by
Ultra
workstations) 		Removed since 2.6.21[116]
tdfx 2.4
3dfx Banshee/Voodoo3
+ 		Removed since 6.3[117]
mga 2.4 Matrox G200/G400/G450 Removed since 6.3[118]
r128 2.4
ATI Rage 128
 Removed since 6.3[119]
i810 2.4
Intel i810
 Removed since 6.3[120]
sis 2.4.17 SiS 300/630/540 Removed since 6.3[121]
i830 2.4.20 Intel 830M/845G/852GM/855GM/865G Removed since 2.6.39[122] (replaced by i915 driver)
via 2.6.13[123]
Unichrome
/ Unichrome Pro 		Removed since 6.3[124]
savage 2.6.14[125] S3 Graphics Savage 3D/MX/IX/4/SuperSavage/Pro/Twister Removed since 6.3[126]

Development

The Direct Rendering Manager is developed within the

repository. The DRM maintainer in turn submits all of these patches that are ready to be mainlined to Linus Torvalds
whenever a new Linux version is going to be released. Torvalds, as top maintainer of the whole kernel, holds the last word on whether a patch is suitable or not for inclusion in the kernel.

For historical reasons, the source code of the libdrm library is maintained under the umbrella of the Mesa project.[128]

History

In 1999, while developing

ATI Radeon
cards, some SiS video cards and Intel 830M and subsequent integrated GPUs.

The split of DRM into two components, DRM core and DRM driver, called DRM core/personality split was done during the second half of 2004,[11][132] and merged into kernel version 2.6.11.[133] This split allowed multiple DRM drivers for multiple devices to work simultaneously, opening the way to multi-GPU support.

The idea of putting all the video mode setting code in one place inside the kernel had been acknowledged for years,[134][135] but the graphics card manufacturers had argued that the only way to do the mode-setting was to use the routines provided by themselves and contained in the Video BIOS of each graphics card. Such code had to be executed using x86 real mode, which prevented it from being invoked by a kernel running in protected mode.[44] The situation changed when Luc Verhaegen and other developers found a way to do the mode-setting natively instead of BIOS-based,[136][44] showing that it was possible to do it using normal kernel code and laying the groundwork for what would become Kernel Mode Setting. In May 2007 Jesse Barnes (Intel) published the first proposal for a drm-modesetting API and a working native implementation of mode-setting for Intel GPUs within the i915 DRM driver.[42] In December 2007 Jerome Glisse started to add the native mode-setting code for ATI cards to the radeon DRM driver.[137][138] Work on both the API and drivers continued during 2008, but got delayed by the necessity of a memory manager also in kernel space to handle the framebuffers.[139]

In October 2008 the Linux kernel 2.6.27 brought a major source code reorganization, prior to some significant upcoming changes. The DRM source code tree was moved to its own source directory /drivers/gpu/drm/ and the different drivers were moved into their own subdirectories. Headers were also moved into a new /include/drm directory.[140]

The increasing complexity of video memory management led to several approaches to solving this issue. The first attempt was the Translation Table Maps (TTM) memory manager, developed by Thomas Hellstrom (

Tungsten Graphics) in collaboration with Emma Anholt (Intel) and Dave Airlie (Red Hat).[5] TTM was proposed for inclusion into mainline kernel 2.6.25 in November 2007,[5] and again in May 2008, but was ditched in favor of a new approach called Graphics Execution Manager (GEM).[24] GEM was first developed by Keith Packard and Emma Anholt from Intel as a simpler solution for memory management for their i915 driver.[6] GEM was well received and merged into the Linux kernel version 2.6.28 released in December 2008.[141] Meanwhile, TTM had to wait until September 2009 to be finally merged into Linux 2.6.31 as a requirement of the new Radeon KMS DRM driver.[142]

With memory management in place to handle buffer objects, DRM developers could finally add to the kernel the already finished API and code to do mode setting. This expanded API is what is called Kernel Mode-setting (KMS) and the drivers which implement it are often referred to as KMS drivers. In March 2009, KMS was merged into the Linux kernel version 2.6.29,[30][143] along with KMS support for the i915 driver.[144] The KMS API has been exposed to user space programs since libdrm 2.4.3.[145] The userspace X.Org DDX driver for Intel graphics cards was also the first to use the new GEM and KMS APIs.[146] KMS support for the radeon DRM driver was added to Linux 2.6.31 release of September 2009.[147][148][149] The new radeon KMS driver used the TTM memory manager but exposed GEM-compatible interfaces and ioctls instead of TTM ones.[23]

Since 2006 the

NVIDIA GPUs outside of the official Linux kernel. In 2010 the nouveau source code was merged into Linux 2.6.33 as an experimental driver.[58][59] At the time of merging, the driver had been already converted to KMS, and behind the GEM API it used TTM as its memory manager.[150]

The new KMS API—including the GEM API—was a big milestone in the development of DRM, but it didn't stop the API from being enhanced in the following years. KMS gained support for

page flips in conjunction with asynchronous VBLANK notifications in Linux 2.6.33[151][152]—only for the i915 driver, radeon and nouveau added it later during Linux 2.6.38 release.[153] The new page flip interface was added to libdrm 2.4.17.[154] In early 2011, during the Linux 2.6.39 release cycle, the so-called dumb buffers—a hardware-independent non-accelerated way to handle simple buffers suitable for use as framebuffers—were added to the KMS API.[155][156] The goal was to reduce the complexity of applications such as Plymouth that don't need to use special accelerated operations provided by driver-specific ioctls.[157] The feature was exposed by libdrm from version 2.4.25 onwards.[158] Later that year it also gained a new main type of objects, called planes. Planes were developed to represent hardware overlays supported by the scanout engine.[159][160] Plane support was merged into Linux 3.3.[161] and libdrm 2.4.30. Another concept added to the API—during Linux 3.5[162] and libdrm 2.4.36[163]
releases—were generic object properties, a method to add generic values to any KMS object. Properties are specially useful to set special behaviour or features to objects such as CRTCs and planes.

An early proof of concept to provide GPU offloading between DRM drivers was developed by Dave Airlie in 2010.

DMA-BUF buffer sharing mechanism introduced by Linux kernel 3.3.[165] The basic DMA-BUF PRIME infrastructure was finished in March 2012[166] and merged into the Linux 3.4 release,[167][168][169] as well as into libdrm 2.4.34.[170] Later during the Linux 3.5 release, several DRM drivers implemented PRIME support, including i915 for Intel cards, radeon for AMD cards and nouveau for NVIDIA cards.[171][172]

In recent years, the DRM API has incrementally expanded with new and improved features. In 2013, as part of GSoC, David Herrmann developed the multiple render nodes feature.[55] His code was added to the Linux kernel version 3.12 as an experimental feature[173][174] supported by i915,[175] radeon[176] and nouveau[177] drivers, and enabled by default since Linux 3.17.[77] In 2014 Matt Roper (Intel) developed the universal planes (or unified planes) concept by which framebuffers (primary planes), overlays (secondary planes) and cursors (cursor planes) are all treated as a single type of object with an unified API.[178] Universal planes support provides a more consistent DRM API with fewer, more generic ioctls.[33] In order to maintain the API backwards compatible, the feature is exposed by DRM core as an additional capability that a DRM driver can provide. Universal plane support debuted in Linux 3.15[179] and libdrm 2.4.55.[180] Several drivers, such as the Intel i915,[181] have already implemented it.

The most recent DRM API enhancement is the atomic mode-setting API, which brings

atomicity to the mode-setting and page flipping operations on a DRM device. The idea of an atomic API for mode-setting was first proposed in early 2012.[182] Ville Syrjälä (Intel) took over the task of designing and implementing such atomic API.[183] Based on his work, Rob Clark (Texas Instruments) took a similar approach aiming to implement atomic page flips.[184] Later in 2013 both proposed features were reunited in a single one using a single ioctl for both tasks.[185] Since it was a requirement, the feature had to wait for the support of universal planes to be merged in mid-2014.[181] During the second half of 2014 the atomic code was greatly enhanced by Daniel Vetter (Intel) and other DRM developers[186]: 18  in order to facilitate the transition for the existing KMS drivers to the new atomic framework.[187] All of this work was finally merged into Linux 3.19[188] and Linux 4.0[189][190][191] releases, and enabled by default since Linux 4.2.[192] libdrm exposed the new atomic API since version 2.4.62.[193] Multiple drivers have already been converted to the new atomic API.[194] By 2018 ten new DRM drivers based on this new atomic model had been added to the Linux kernel.[195]

Adoption

The Direct Rendering Manager kernel subsystem was initially developed to be used with the new

Weston reference compositor. kmscon is a virtual console implementation that runs in user space using DRM KMS facilities.[196]

In 2015, version 358.09 (beta) of the proprietary

Nvidia GeForce driver received support for the DRM mode-setting interface implemented as a new kernel blob called nvidia-modeset.ko. This new driver component works in conjunction with the nvidia.ko kernel module to program the display engine (i.e. display controller) of the GPU.[197]

See also

References

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