Fe FET

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This article is about Ferroelectric memory with a ferroelectric FET gate. For non volatile memory devices using ferroelectric capacitors, see Ferroelectric RAM.
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A ferroelectric field-effect transistor (Fe FET) is a type of

channel
). Permanent electrical field polarisation in the ferroelectric causes this type of device to retain the transistor's state (on or off) in the absence of any electrical bias.

FeFET based devices are used in FeFET memory - a type of single transistor non-volatile memory.

Description

In 1955,

PLZT).[3] In the late 1980 Ferroelectric RAM was developed, using a ferroelectric thin film as capacitor, connected to an addressing FET.[3]

FeFET based memory devices are read using voltages below the coercive voltage for the ferroelectric.[4]

Issues involved in realising a practical FeFET memory device include (as of 2006) : choice of a high permitivity, highly insulating layer between ferroelectric and gate; issues with high remanent polarisation of ferroelectrics; limited retention time (c. a few days, cf required 10 years).[5]

Provided the ferroelectric layer can be scaled accordingly FeFET based memory devices are expected to scale (shrink) as well as MOSFET devices; however a limit of ~20 nm laterally may exist[6] (the superparaelectric limit, aka ferroelectric limit). Other challenges to feature shrinks include : reduced film thickness causing additional (undesired) polarisation effects; charge injection; and leakage currents.[5]

Research and development

Structure of a 1 Transistor FeRAM cell

In 2017 FeFET based

hafnium dioxide (HfO2) as the ferroelectric- the smallest FeFET cell size reported was 0.025 μm2, the devices were built as 32Mbit arrays, using set/reset pulses of ~10ns duration at 4.2V - the devices showed endurance of 105 cycles and data retention up to 300C.[7]

As of 2017[update] the startup Ferroelectric Memory Company is attempting to develop FeFET memory into a commercial device, based on hafnium dioxide. The company's technology is claimed to scale to modern

HKMG, and is easily integrable into conventional CMOS processes, requiring only two additional masks.[8]

See also

  • Ferroelectric RAM, RAM that uses a ferroelectric material in the capacitor of a conventional DRAM structure

References

  1. ISBN 9783739248943
    .
  2. ^ Park et al. 2016, §1.1.1, p.3.
  3. ^ a b c Park et al. 2016, §1.1.1, p.4.
  4. ^ Park et al. 2016, § 1.1.2, p.6.
  5. ^ a b c Zschech, Ehrenfried; Whelan, Caroline; Mikolajick, Thomas, eds. (2005), Materials for Information Technology: Devices, Interconnects and Packaging, Springer, pp. 157 –
  6. ISSN 0003-6951
    .
  7. ^
    S2CID 19624615
  8. ^ Lapedus, Mark (16 Feb 2017), "What Are FeFETs?", semiengineering.com
  • Park, Byung-Eun; Ishiwara, Hiroshi; Okuyama, Masanori; Sakai, Shigeki; Yoon, Sung-Min, eds. (2016), "Ferroelectric-Gate Field Effect Transistor Memories: Device Physics and Applications", Topics in Applied Physics, no. 131, Springer

Further reading

  • Ishiwara, Hiroshi (2012), "FeFET and ferroelectric random access memories", Multifunctional Oxide Heterostructures, pp. 340–363,
    ISBN 978-0-19-958412-3
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