XNOR gate
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XNOR gate truth table | ||
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Input | Output | |
A | B | A XNOR B |
0 | 0 | 1 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 1 |
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The XNOR gate (sometimes ENOR, EXNOR, NXOR, XAND and pronounced as Exclusive NOR) is a digital
It is equivalent to the logical connective () from mathematical logic, also known as the material biconditional. The two-input version implements logical equality, behaving according to the truth table to the right, and hence the gate is sometimes called an "equivalence gate". A high output (1) results if both of the inputs to the gate are the same. If one but not both inputs are high (1), a low output (0) results.The algebraic notation used to represent the XNOR operation is . The algebraic expressions and both represent the XNOR gate with inputs A and B.
Symbols
There are two symbols for XNOR gates: one with distinctive shape and one with rectangular shape and label. Both symbols for the XNOR gate are that of the XOR gate with an added inversion bubble.
Hardware description
XNOR gates are represented in most
Both the TTL
Datasheets are readily available in most datasheet databases and suppliers.
Implementation
AND-OR-Invert logic
An XNOR gate can be implemented using a NAND gate and an OR-AND-Invert gate, as shown in the following picture. [3] This is based on the identity
An alternative, which is useful when inverted inputs are also available (for example from a
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XNOR implemention using a NAND and an OAI gate
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XNOR implementation using a 2-2-AOI gate with normal and inverted inputs
CMOS
CMOS implementations based on the OAI logic above can be realized with 10
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An XNOR-gate in CMOS using a NAND and an OR-AND-Invert gate
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An XNOR gate in CMOS using both normal and inverted inputs
Pinout
Both the 4077 and 74x266 devices (SN74LS266, 74HC266, 74266, etc.) have the same pinout diagram, as follows:
Pinout diagram of the 74HC266N, 74LS266 and CD4077 quad XNOR plastic
- Input A1
- Input B1
- Output Q1 (high if and only if A1 and B1 have the same logic level)
- Output Q2
- Input B2
- Input A2
- Vss (GND) common power and signal ground pin
- Input A3
- Input B3
- Output Q3
- Output Q4
- Input B4
- Input A4
- Vdd for CMOS (Vcc for TTL) positive power supply (see datasheets for acceptable voltage ranges)
Alternatives
If a specific type of gate is not available, a circuit that implements the same function can be constructed from other available gates. A circuit implementing an XNOR function can be trivially constructed from an XOR gate followed by a NOT gate. If we consider the expression , we can construct an XNOR gate circuit directly using AND, OR and NOT gates. However, this approach requires five gates of three different kinds.
As alternative, if different gates are available we can apply Boolean algebra to transform as stated above, and apply
An XNOR gate circuit can be made from four NOR gates. In fact, both NAND and NOR gates are so-called "universal gates" and any logical function can be constructed from either NAND logic or NOR logic alone. If the four NOR gates are replaced by NAND gates, this results in an XOR gate, which can be converted to an XNOR gate by inverting the output or one of the inputs (e.g. with a fifth NAND gate).
Desired gate | NAND construction | NOR construction |
---|---|---|
An alternative arrangement is of five NAND gates in a topology that emphasizes the construction of the function from , noting from
Desired gate | NAND construction | NOR construction |
---|---|---|
For the NAND constructions, the lower arrangement offers the advantage of a shorter propagation delay (the time delay between an input changing and the output changing). For the NOR constructions, the upper arrangement requires fewer gates.
From the opposite perspective, constructing other gates using only XNOR gates is possible though XNOR is not a fully universal logic gate. NOT and XOR gates can be constructed this way.
More than two inputs
Although other gates (OR, NOR, AND, NAND) are available from manufacturers with three or more inputs per gate, this is not strictly true with XOR and XNOR gates. However, extending the concept of the
Input | Output | ||
---|---|---|---|
A | B | C | Q |
0 | 0 | 0 | 1 |
0 | 0 | 1 | 0 |
0 | 1 | 0 | 0 |
0 | 1 | 1 | 1 |
1 | 0 | 0 | 0 |
1 | 0 | 1 | 1 |
1 | 1 | 0 | 1 |
1 | 1 | 1 | 0 |
This is effectively Q = NOT ((A XOR B) XOR C). Another way to interpret this is that the output is true if an even number of inputs are true. It does not implement a logical "equivalence" function, unlike two-input XNOR gates.
See also
- AND gate
- OR gate
- NOT gate
- NAND gate
- NOR gate
- XOR gate
- Kronecker delta function
- Logical biconditional
- If and only if
References
- ^ "Exclusive-NOR Gate Tutorial". Retrieved 6 May 2018.
- ^ "XNOR Logic Gates". Retrieved 6 May 2018.
- ^ Fischer, P. "Aussagenlogik und Gatter" (PDF). University of Heidelberg. Retrieved 2024-01-21.