Tejas and Jayhawk
Tejas was a code name for
History
In early 2003, Intel showed Tejas and a plan to release it sometime in 2004 with possible delays into 2005. Its development however, was cancelled on May 7, 2004.
This cancellation reflected Intel's intention to focus on dual-core chips for the
This defined the end for the NetBurst architecture, with Core setting the foundation and path for power efficient architectures that followed along the Tick–tock model. Although NetBurst was a dead end for the company, its concepts were later reused and repurposed[5] in Sandy Bridge.
To bridge the gap left by Tejas' cancellation in the x86 market, Intel did one last revision to NetBurst, codenamed Cedar Mill (single core) and Presler (dual core).
Design and microarchitecture
Tejas and Jayhawk were to make several improvements on the Pentium 4's
The
Initial claims reported early samples of single core 90 nm Tejas running at 2.8 GHz and rated for 150 W TDP on the LGA 775 socket,[7] a notable increase over single core 90 nm Prescott (Pentium 4 521, 2.8 GHz, 84 W TDP)[8] and higher than 90 nm dual core Smithfield (Pentium D 820, 2.8 GHz, 95 W TDP).[9] In contrast, 65 nm dual core Core 2 Duo processors had a maximum of 65 W TDP (E6850, 3.00 GHz)[10] while being much more efficient with markedly higher performance per clock.
However, the existence of engineering samples have been challenged and no source indicates that tape-out of Tejas ever existed - the sample shown in the Anandtech article [7] being a Prescott B0 ES.[11] Most probably only thermal samples of Tejas were produced.
See also
References
- ^ a b Dutton, Paul. "Pentium V will launch with 64-bit Windows Elements". The Inquirer. Archived from the original on May 11, 2009. Retrieved 31 March 2013.
{{cite web}}: CS1 maint: unfit URL (link) - ^ "Intel cancels Tejas, moves to dual-core designs". EETimes. 2004-05-07.
- )
- ^ Shimpi, Anand Lal. "Intel's Core 2 Extreme & Core 2 Duo: The Empire Strikes Back". www.anandtech.com. Retrieved 2023-06-24.
- ^ "Intel's Netburst: Failure is a Foundation for Success". Chips and Cheese. 2022-06-17. Retrieved 2023-06-24.
- ^ a b Chip magicians at work: patching at 45nm
- ^ a b Shimpi, Anand Lal. "Covert Ops in Taiwan - Intel Tejas & Socket 775 Unveiled". Retrieved 2016-12-01.
- ^ "Intel® Pentium® 4 Processor 521 supporting HT Technology (1M Cache, 2.80 GHz, 800 MHz FSB) Specifications". Intel® ARK (Product Specs). Retrieved 2016-12-01.
- ^ "Intel® Pentium® D Processor 820 (2M Cache, 2.80 GHz, 800 MHz FSB) Specifications". Intel® ARK (Product Specs). Retrieved 2016-12-01.
- ^ "Intel® Core™2 Duo Processor E6850 (4M Cache, 3.00 GHz, 1333 MHz FSB) Specifications". Intel® ARK (Product Specs). Retrieved 2016-12-01.
- ^ Samuel Demeulemeester (2018-09-11). "J'ai enfin résolu un mystère vieux de 15 ans : ce post de [anandtech] qui disait en janvier [2004] avoir une photo de Tejas alors que mes sources affirmaient que Tejas n'avait jamais tape-out. J'ai retrouvé le CPU ... et c'est un Prescott B0 ES" [I finally solved a 15-years-old mystery: this anandtech post saying in January [2004] to have a photograph of Tejas whereas my sources stated that Tejas was never tape-out. I found the CPU ... and it's a Prescott B0 ES.]. Retrieved 2018-09-12.
General
- Flynn, Laurie J. (8 May 2004). "Intel Halts Development Of 2 New Microprocessors". The New York Times.
- Shilov, Anton (May 7, 2004). "Intel to Cancel NetBurst, Pentium 4, Xeon Evolution". Xbit. Archived from the original on April 22, 2015.
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